5 files changed, 13 insertions, 7 deletions
diff --git a/src/dev/alpha/backdoor.cc b/src/dev/alpha/backdoor.cc
index 3ba6cbd24..66f682e66 100644
--- a/src/dev/alpha/backdoor.cc
+++ b/src/dev/alpha/backdoor.cc
@@ -84,7 +84,7 @@ void
 AlphaBackdoor::startup()
 {
     system->setAlphaAccess(pioAddr);
-    alphaAccess->numCPUs = system->getNumCPUs();
+    alphaAccess->numCPUs = system->numContexts();
     alphaAccess->kernStart = system->getKernelStart();
     alphaAccess->kernEnd = system->getKernelEnd();
     alphaAccess->entryPoint = system->getKernelEntry();
diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index 4477b5adc..52a2aea14 100644
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -110,7 +110,13 @@ TsunamiCChip::read(PacketPtr pkt)
                    break;
               case TSDEV_CC_MISC:
                   pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
-                                     (pkt->req->getCpuNum() & 0x3));
+                                     (pkt->req->contextId() & 0x3));
+                  // currently, FS cannot handle MT so contextId and
+                  // cpuId are effectively the same, don't know if it will
+                  // matter if FS becomes MT enabled.  I suspect no because
+                  // we are currently able to boot up to 64 procs anyway
+                  // which would render the CPUID of this register useless
+                  // anyway
                   break;
               case TSDEV_CC_AAR0:
               case TSDEV_CC_AAR1:
diff --git a/src/dev/mips/malta_cchip.cc b/src/dev/mips/malta_cchip.cc
index 5a4ea4585..265977665 100755
--- a/src/dev/mips/malta_cchip.cc
+++ b/src/dev/mips/malta_cchip.cc
@@ -103,7 +103,7 @@ MaltaCChip::read(PacketPtr pkt)
                    break;
               case TSDEV_CC_MISC:
                   pkt->set((ipint << 8) & 0xF | (itint << 4) & 0xF |
-                                     (pkt->req->getCpuNum() & 0x3));
+                                     (pkt->req->contextId() & 0x3));
                   break;
               case TSDEV_CC_AAR0:
               case TSDEV_CC_AAR1:
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 49806d37c..bf7398e62 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -379,7 +379,7 @@ Device::read(PacketPtr pkt)
     assert(config.command & PCI_CMD_MSE);
     assert(pkt->getAddr() >= BARAddrs[0] && pkt->getSize() < BARSize[0]);
 
-    int cpu = pkt->req->getCpuNum();
+    int cpu = pkt->req->contextId();
     Addr daddr = pkt->getAddr() - BARAddrs[0];
     Addr index = daddr >> Regs::VirtualShift;
     Addr raddr = daddr & Regs::VirtualMask;
@@ -466,7 +466,7 @@ Device::write(PacketPtr pkt)
     assert(config.command & PCI_CMD_MSE);
     assert(pkt->getAddr() >= BARAddrs[0] && pkt->getSize() < BARSize[0]);
 
-    int cpu = pkt->req->getCpuNum();
+    int cpu = pkt->req->contextId();
     Addr daddr = pkt->getAddr() - BARAddrs[0];
     Addr index = daddr >> Regs::VirtualShift;
     Addr raddr = daddr & Regs::VirtualMask;
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index 6608fc64a..f99ee5804 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -120,7 +120,7 @@ void
 Iob::readJBus(PacketPtr pkt)
 {
         Addr accessAddr = pkt->getAddr() - iobJBusAddr;
-        int cpuid = pkt->req->getCpuNum();
+        int cpuid = pkt->req->contextId();
         int index;
         uint64_t data;
 
@@ -235,7 +235,7 @@ void
 Iob::writeJBus(PacketPtr pkt)
 {
         Addr accessAddr = pkt->getAddr() - iobJBusAddr;
-        int cpuid = pkt->req->getCpuNum();
+        int cpuid = pkt->req->contextId();
         int index;
         uint64_t data;