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-rw-r--r--src/dev/arm/flash_device.cc4
-rw-r--r--src/dev/arm/ufs_device.cc4
-rw-r--r--src/dev/copy_engine.cc14
-rw-r--r--src/dev/dma_device.cc4
-rw-r--r--src/dev/i8254xGBe.cc14
-rw-r--r--src/dev/i8254xGBe.hh4
-rw-r--r--src/dev/ide_disk.cc6
-rw-r--r--src/dev/io_device.cc4
-rw-r--r--src/dev/ns_gige.cc8
-rw-r--r--src/dev/pcidev.cc4
-rw-r--r--src/dev/sinic.cc4
11 files changed, 35 insertions, 35 deletions
diff --git a/src/dev/arm/flash_device.cc b/src/dev/arm/flash_device.cc
index 96f8f0566..e4bfcf5c9 100644
--- a/src/dev/arm/flash_device.cc
+++ b/src/dev/arm/flash_device.cc
@@ -601,10 +601,10 @@ FlashDevice::drain(DrainManager *dm)
if (count) {
DPRINTF(Drain, "Flash device is draining...\n");
- setDrainState(Drainable::Draining);
+ setDrainState(DrainState::Draining);
} else {
DPRINTF(Drain, "Flash device drained\n");
- setDrainState(Drainable::Drained);
+ setDrainState(DrainState::Drained);
}
return count;
}
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index 02df00e35..ef6398216 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -2333,10 +2333,10 @@ UFSHostDevice::drain(DrainManager *dm)
if (count) {
DPRINTF(UFSHostDevice, "UFSDevice is draining...\n");
- setDrainState(Drainable::Draining);
+ setDrainState(DrainState::Draining);
} else {
DPRINTF(UFSHostDevice, "UFSDevice drained\n");
- setDrainState(Drainable::Drained);
+ setDrainState(DrainState::Drained);
}
return count;
}
diff --git a/src/dev/copy_engine.cc b/src/dev/copy_engine.cc
index 5506103b1..035f824fa 100644
--- a/src/dev/copy_engine.cc
+++ b/src/dev/copy_engine.cc
@@ -140,12 +140,12 @@ CopyEngine::CopyEngineChannel::recvCommand()
cr.status.dma_transfer_status(0);
nextState = DescriptorFetch;
fetchAddress = cr.descChainAddr;
- if (ce->getDrainState() == Drainable::Running)
+ if (ce->getDrainState() == DrainState::Running)
fetchDescriptor(cr.descChainAddr);
} else if (cr.command.append_dma()) {
if (!busy) {
nextState = AddressFetch;
- if (ce->getDrainState() == Drainable::Running)
+ if (ce->getDrainState() == DrainState::Running)
fetchNextAddr(lastDescriptorAddr);
} else
refreshNext = true;
@@ -635,20 +635,20 @@ CopyEngine::CopyEngineChannel::fetchAddrComplete()
bool
CopyEngine::CopyEngineChannel::inDrain()
{
- if (ce->getDrainState() == Drainable::Draining) {
+ if (ce->getDrainState() == DrainState::Draining) {
DPRINTF(Drain, "CopyEngine done draining, processing drain event\n");
assert(drainManager);
drainManager->signalDrainDone();
drainManager = NULL;
}
- return ce->getDrainState() != Drainable::Running;
+ return ce->getDrainState() != DrainState::Running;
}
unsigned int
CopyEngine::CopyEngineChannel::drain(DrainManager *dm)
{
- if (nextState == Idle || ce->getDrainState() != Drainable::Running)
+ if (nextState == Idle || ce->getDrainState() != DrainState::Running)
return 0;
unsigned int count = 1;
count += cePort.drain(dm);
@@ -667,9 +667,9 @@ CopyEngine::drain(DrainManager *dm)
count += chan[x]->drain(dm);
if (count)
- setDrainState(Draining);
+ setDrainState(DrainState::Draining);
else
- setDrainState(Drained);
+ setDrainState(DrainState::Drained);
DPRINTF(Drain, "CopyEngine not drained\n");
return count;
diff --git a/src/dev/dma_device.cc b/src/dev/dma_device.cc
index 24d833b54..a778833ff 100644
--- a/src/dev/dma_device.cc
+++ b/src/dev/dma_device.cc
@@ -130,9 +130,9 @@ DmaDevice::drain(DrainManager *dm)
{
unsigned int count = pioPort.drain(dm) + dmaPort.drain(dm);
if (count)
- setDrainState(Drainable::Draining);
+ setDrainState(DrainState::Draining);
else
- setDrainState(Drainable::Drained);
+ setDrainState(DrainState::Drained);
return count;
}
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index 0ff52bda0..3b49c8b5d 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -586,7 +586,7 @@ IGbE::write(PacketPtr pkt)
case REG_RDT:
regs.rdt = val;
DPRINTF(EthernetSM, "RXS: RDT Updated.\n");
- if (getDrainState() == Drainable::Running) {
+ if (getDrainState() == DrainState::Running) {
DPRINTF(EthernetSM, "RXS: RDT Fetching Descriptors!\n");
rxDescCache.fetchDescriptors();
} else {
@@ -626,7 +626,7 @@ IGbE::write(PacketPtr pkt)
case REG_TDT:
regs.tdt = val;
DPRINTF(EthernetSM, "TXS: TX Tail pointer updated\n");
- if (getDrainState() == Drainable::Running) {
+ if (getDrainState() == DrainState::Running) {
DPRINTF(EthernetSM, "TXS: TDT Fetching Descriptors!\n");
txDescCache.fetchDescriptors();
} else {
@@ -905,7 +905,7 @@ void
IGbE::DescCache<T>::writeback1()
{
// If we're draining delay issuing this DMA
- if (igbe->getDrainState() != Drainable::Running) {
+ if (igbe->getDrainState() != DrainState::Running) {
igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay);
return;
}
@@ -986,7 +986,7 @@ void
IGbE::DescCache<T>::fetchDescriptors1()
{
// If we're draining delay issuing this DMA
- if (igbe->getDrainState() != Drainable::Running) {
+ if (igbe->getDrainState() != DrainState::Running) {
igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay);
return;
}
@@ -2051,7 +2051,7 @@ void
IGbE::restartClock()
{
if (!tickEvent.scheduled() && (rxTick || txTick || txFifoTick) &&
- getDrainState() == Drainable::Running)
+ getDrainState() == DrainState::Running)
schedule(tickEvent, clockEdge(Cycles(1)));
}
@@ -2075,9 +2075,9 @@ IGbE::drain(DrainManager *dm)
if (count) {
DPRINTF(Drain, "IGbE not drained\n");
- setDrainState(Drainable::Draining);
+ setDrainState(DrainState::Draining);
} else
- setDrainState(Drainable::Drained);
+ setDrainState(DrainState::Drained);
return count;
}
diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh
index d353c1d83..116fa5b95 100644
--- a/src/dev/i8254xGBe.hh
+++ b/src/dev/i8254xGBe.hh
@@ -352,7 +352,7 @@ class IGbE : public EtherDevice
virtual void updateHead(long h) { igbe->regs.rdh(h); }
virtual void enableSm();
virtual void fetchAfterWb() {
- if (!igbe->rxTick && igbe->getDrainState() == Drainable::Running)
+ if (!igbe->rxTick && igbe->getDrainState() == DrainState::Running)
fetchDescriptors();
}
@@ -414,7 +414,7 @@ class IGbE : public EtherDevice
virtual void enableSm();
virtual void actionAfterWb();
virtual void fetchAfterWb() {
- if (!igbe->txTick && igbe->getDrainState() == Drainable::Running)
+ if (!igbe->txTick && igbe->getDrainState() == DrainState::Running)
fetchDescriptors();
}
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index bbdee8e51..2e6df3805 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -342,7 +342,7 @@ IdeDisk::doDmaTransfer()
panic("Inconsistent DMA transfer state: dmaState = %d devState = %d\n",
dmaState, devState);
- if (ctrl->dmaPending() || ctrl->getDrainState() != Drainable::Running) {
+ if (ctrl->dmaPending() || ctrl->getDrainState() != DrainState::Running) {
schedule(dmaTransferEvent, curTick() + DMA_BACKOFF_PERIOD);
return;
} else
@@ -436,7 +436,7 @@ IdeDisk::doDmaRead()
curPrd.getByteCount(), TheISA::PageBytes);
}
- if (ctrl->dmaPending() || ctrl->getDrainState() != Drainable::Running) {
+ if (ctrl->dmaPending() || ctrl->getDrainState() != DrainState::Running) {
schedule(dmaReadWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
return;
} else if (!dmaReadCG->done()) {
@@ -518,7 +518,7 @@ IdeDisk::doDmaWrite()
dmaWriteCG = new ChunkGenerator(curPrd.getBaseAddr(),
curPrd.getByteCount(), TheISA::PageBytes);
}
- if (ctrl->dmaPending() || ctrl->getDrainState() != Drainable::Running) {
+ if (ctrl->dmaPending() || ctrl->getDrainState() != DrainState::Running) {
schedule(dmaWriteWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
DPRINTF(IdeDisk, "doDmaWrite: rescheduling\n");
return;
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index c25a28dd2..9e5855a0b 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -99,9 +99,9 @@ PioDevice::drain(DrainManager *dm)
unsigned int count;
count = pioPort.drain(dm);
if (count)
- setDrainState(Drainable::Draining);
+ setDrainState(DrainState::Draining);
else
- setDrainState(Drainable::Drained);
+ setDrainState(DrainState::Drained);
return count;
}
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index c525f6359..7a8d202c5 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -1068,7 +1068,7 @@ NSGigE::doRxDmaRead()
assert(rxDmaState == dmaIdle || rxDmaState == dmaReadWaiting);
rxDmaState = dmaReading;
- if (dmaPending() || getDrainState() != Drainable::Running)
+ if (dmaPending() || getDrainState() != DrainState::Running)
rxDmaState = dmaReadWaiting;
else
dmaRead(rxDmaAddr, rxDmaLen, &rxDmaReadEvent, (uint8_t*)rxDmaData);
@@ -1099,7 +1099,7 @@ NSGigE::doRxDmaWrite()
assert(rxDmaState == dmaIdle || rxDmaState == dmaWriteWaiting);
rxDmaState = dmaWriting;
- if (dmaPending() || getDrainState() != Running)
+ if (dmaPending() || getDrainState() != DrainState::Running)
rxDmaState = dmaWriteWaiting;
else
dmaWrite(rxDmaAddr, rxDmaLen, &rxDmaWriteEvent, (uint8_t*)rxDmaData);
@@ -1515,7 +1515,7 @@ NSGigE::doTxDmaRead()
assert(txDmaState == dmaIdle || txDmaState == dmaReadWaiting);
txDmaState = dmaReading;
- if (dmaPending() || getDrainState() != Running)
+ if (dmaPending() || getDrainState() != DrainState::Running)
txDmaState = dmaReadWaiting;
else
dmaRead(txDmaAddr, txDmaLen, &txDmaReadEvent, (uint8_t*)txDmaData);
@@ -1546,7 +1546,7 @@ NSGigE::doTxDmaWrite()
assert(txDmaState == dmaIdle || txDmaState == dmaWriteWaiting);
txDmaState = dmaWriting;
- if (dmaPending() || getDrainState() != Running)
+ if (dmaPending() || getDrainState() != DrainState::Running)
txDmaState = dmaWriteWaiting;
else
dmaWrite(txDmaAddr, txDmaLen, &txDmaWriteEvent, (uint8_t*)txDmaData);
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index 581ae2ebd..5788c94d2 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -261,9 +261,9 @@ PciDevice::drain(DrainManager *dm)
unsigned int count;
count = pioPort.drain(dm) + dmaPort.drain(dm) + configPort.drain(dm);
if (count)
- setDrainState(Drainable::Draining);
+ setDrainState(DrainState::Draining);
else
- setDrainState(Drainable::Drained);
+ setDrainState(DrainState::Drained);
return count;
}
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index d5a05b319..1ba076200 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -868,7 +868,7 @@ Device::rxKick()
break;
case rxBeginCopy:
- if (dmaPending() || getDrainState() != Drainable::Running)
+ if (dmaPending() || getDrainState() != DrainState::Running)
goto exit;
rxDmaAddr = params()->platform->pciToDma(
@@ -1068,7 +1068,7 @@ Device::txKick()
break;
case txBeginCopy:
- if (dmaPending() || getDrainState() != Drainable::Running)
+ if (dmaPending() || getDrainState() != DrainState::Running)
goto exit;
txDmaAddr = params()->platform->pciToDma(
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-30 19:52:00 +0000