diff options
Diffstat (limited to 'src/dev')
35 files changed, 103 insertions, 93 deletions
diff --git a/src/dev/BadDevice.py b/src/dev/BadDevice.py index d6d68f86d..faaa265d0 100644 --- a/src/dev/BadDevice.py +++ b/src/dev/BadDevice.py @@ -27,7 +27,7 @@ # Authors: Nathan Binkert from m5.params import * -from Device import BasicPioDevice +from m5.objects.Device import BasicPioDevice class BadDevice(BasicPioDevice): type = 'BadDevice' diff --git a/src/dev/Device.py b/src/dev/Device.py index e4656078d..c137ce66d 100644 --- a/src/dev/Device.py +++ b/src/dev/Device.py @@ -42,7 +42,8 @@ from m5.params import * from m5.proxy import * from m5.util.fdthelper import * -from MemObject import MemObject + +from m5.objects.MemObject import MemObject class PioDevice(MemObject): type = 'PioDevice' diff --git a/src/dev/Platform.py b/src/dev/Platform.py index b182acfd6..c6b6fdebe 100644 --- a/src/dev/Platform.py +++ b/src/dev/Platform.py @@ -29,6 +29,7 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * + class Platform(SimObject): type = 'Platform' abstract = True diff --git a/src/dev/alpha/AlphaBackdoor.py b/src/dev/alpha/AlphaBackdoor.py index 29372bce8..6355269fc 100644 --- a/src/dev/alpha/AlphaBackdoor.py +++ b/src/dev/alpha/AlphaBackdoor.py @@ -29,7 +29,8 @@ from m5.defines import buildEnv from m5.params import * from m5.proxy import * -from Device import BasicPioDevice + +from m5.objects.Device import BasicPioDevice class AlphaBackdoor(BasicPioDevice): type = 'AlphaBackdoor' diff --git a/src/dev/alpha/Tsunami.py b/src/dev/alpha/Tsunami.py index f807e946f..e5b8885ad 100644 --- a/src/dev/alpha/Tsunami.py +++ b/src/dev/alpha/Tsunami.py @@ -28,12 +28,12 @@ from m5.params import * from m5.proxy import * -from BadDevice import BadDevice -from AlphaBackdoor import AlphaBackdoor -from Device import BasicPioDevice, IsaFake, BadAddr -from PciHost import GenericPciHost -from Platform import Platform -from Uart import Uart8250 +from m5.objects.BadDevice import BadDevice +from m5.objects.AlphaBackdoor import AlphaBackdoor +from m5.objects.Device import BasicPioDevice, IsaFake, BadAddr +from m5.objects.PciHost import GenericPciHost +from m5.objects.Platform import Platform +from m5.objects.Uart import Uart8250 class TsunamiCChip(BasicPioDevice): type = 'TsunamiCChip' diff --git a/src/dev/arm/EnergyCtrl.py b/src/dev/arm/EnergyCtrl.py index 571f94178..d007ea7b4 100644 --- a/src/dev/arm/EnergyCtrl.py +++ b/src/dev/arm/EnergyCtrl.py @@ -39,7 +39,7 @@ from m5.params import * from m5.SimObject import SimObject -from Device import BasicPioDevice +from m5.objects.Device import BasicPioDevice from m5.proxy import * from m5.util.fdthelper import * diff --git a/src/dev/arm/FlashDevice.py b/src/dev/arm/FlashDevice.py index ed3b9d04d..a4f2e34ed 100644 --- a/src/dev/arm/FlashDevice.py +++ b/src/dev/arm/FlashDevice.py @@ -38,7 +38,8 @@ from m5.params import * from m5.proxy import * -from AbstractNVM import * + +from m5.objects.AbstractNVM import * #Distribution of the data. #sequential: sequential (address n+1 is likely to be on the same plane as n) diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py index 0e0aa89fe..29535e4e9 100644 --- a/src/dev/arm/Gic.py +++ b/src/dev/arm/Gic.py @@ -40,8 +40,8 @@ from m5.proxy import * from m5.util.fdthelper import * from m5.SimObject import SimObject -from Device import PioDevice -from Platform import Platform +from m5.objects.Device import PioDevice +from m5.objects.Platform import Platform class BaseGic(PioDevice): type = 'BaseGic' diff --git a/src/dev/arm/NoMali.py b/src/dev/arm/NoMali.py index 4272f90d0..31509e62d 100644 --- a/src/dev/arm/NoMali.py +++ b/src/dev/arm/NoMali.py @@ -36,8 +36,9 @@ # Authors: Andreas Sandberg from m5.params import * -from Device import BasicPioDevice -from Gic import * + +from m5.objects.Device import BasicPioDevice +from m5.objects.Gic import * class NoMaliGpuType(Enum): vals = [ 'T60x', diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index d7ce9eba0..af19f3bbd 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -45,31 +45,32 @@ from m5.defines import buildEnv from m5.params import * from m5.proxy import * from m5.util.fdthelper import * -from ClockDomain import ClockDomain -from VoltageDomain import VoltageDomain -from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice -from PciHost import * -from Ethernet import NSGigE, IGbE_igb, IGbE_e1000 -from Ide import * -from Platform import Platform -from Terminal import Terminal -from Uart import Uart -from SimpleMemory import SimpleMemory -from Gic import * -from EnergyCtrl import EnergyCtrl -from ClockedObject import ClockedObject -from ClockDomain import SrcClockDomain -from SubSystem import SubSystem -from Graphics import ImageFormat -from ClockedObject import ClockedObject -from PS2 import * -from VirtIOMMIO import MmioVirtIO +from m5.objects.ClockDomain import ClockDomain +from m5.objects.VoltageDomain import VoltageDomain +from m5.objects.Device import \ + BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice +from m5.objects.PciHost import * +from m5.objects.Ethernet import NSGigE, IGbE_igb, IGbE_e1000 +from m5.objects.Ide import * +from m5.objects.Platform import Platform +from m5.objects.Terminal import Terminal +from m5.objects.Uart import Uart +from m5.objects.SimpleMemory import SimpleMemory +from m5.objects.Gic import * +from m5.objects.EnergyCtrl import EnergyCtrl +from m5.objects.ClockedObject import ClockedObject +from m5.objects.ClockDomain import SrcClockDomain +from m5.objects.SubSystem import SubSystem +from m5.objects.Graphics import ImageFormat +from m5.objects.ClockedObject import ClockedObject +from m5.objects.PS2 import * +from m5.objects.VirtIOMMIO import MmioVirtIO # Platforms with KVM support should generally use in-kernel GIC # emulation. Use a GIC model that automatically switches between # gem5's GIC model and KVM's GIC model if KVM is available. try: - from KvmGic import MuxingKvmGic + from m5.objects.KvmGic import MuxingKvmGic kvm_gicv2_class = MuxingKvmGic except ImportError: # KVM support wasn't compiled into gem5. Fallback to a diff --git a/src/dev/arm/UFSHostDevice.py b/src/dev/arm/UFSHostDevice.py index f9369ebc9..3c7dda722 100644 --- a/src/dev/arm/UFSHostDevice.py +++ b/src/dev/arm/UFSHostDevice.py @@ -38,8 +38,8 @@ import sys from m5.params import * from m5.proxy import * -from Device import DmaDevice -from AbstractNVM import * +from m5.objects.Device import DmaDevice +from m5.objects.AbstractNVM import * class UFSHostDevice(DmaDevice): type = 'UFSHostDevice' diff --git a/src/dev/arm/VirtIOMMIO.py b/src/dev/arm/VirtIOMMIO.py index 2c95ef3ce..e91fb8156 100644 --- a/src/dev/arm/VirtIOMMIO.py +++ b/src/dev/arm/VirtIOMMIO.py @@ -41,9 +41,9 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from Gic import ArmInterruptPin -from VirtIO import VirtIODeviceBase, VirtIODummyDevice +from m5.objects.Device import BasicPioDevice +from m5.objects.Gic import ArmInterruptPin +from m5.objects.VirtIO import VirtIODeviceBase, VirtIODummyDevice class MmioVirtIO(BasicPioDevice): type = 'MmioVirtIO' diff --git a/src/dev/i2c/I2C.py b/src/dev/i2c/I2C.py index f249d0648..0d1b2a97a 100644 --- a/src/dev/i2c/I2C.py +++ b/src/dev/i2c/I2C.py @@ -37,7 +37,7 @@ from m5.SimObject import SimObject from m5.params import * -from Device import BasicPioDevice +from m5.objects.Device import BasicPioDevice class I2CDevice(SimObject): type = 'I2CDevice' diff --git a/src/dev/mips/Malta.py b/src/dev/mips/Malta.py index 920b5fe94..cb15dd9aa 100755 --- a/src/dev/mips/Malta.py +++ b/src/dev/mips/Malta.py @@ -29,10 +29,10 @@ from m5.params import * from m5.proxy import * -from BadDevice import BadDevice -from Device import BasicPioDevice -from Platform import Platform -from Uart import Uart8250 +from m5.objects.BadDevice import BadDevice +from m5.objects.Device import BasicPioDevice +from m5.objects.Platform import Platform +from m5.objects.Uart import Uart8250 class MaltaCChip(BasicPioDevice): type = 'MaltaCChip' diff --git a/src/dev/net/Ethernet.py b/src/dev/net/Ethernet.py index 71665c564..7c3c766bc 100644 --- a/src/dev/net/Ethernet.py +++ b/src/dev/net/Ethernet.py @@ -42,7 +42,7 @@ from m5.defines import buildEnv from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from PciDevice import PciDevice +from m5.objects.PciDevice import PciDevice class EtherObject(SimObject): type = 'EtherObject' diff --git a/src/dev/pci/CopyEngine.py b/src/dev/pci/CopyEngine.py index f1b9df1b9..1570365a6 100644 --- a/src/dev/pci/CopyEngine.py +++ b/src/dev/pci/CopyEngine.py @@ -29,7 +29,8 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from PciDevice import PciDevice + +from m5.objects.PciDevice import PciDevice class CopyEngine(PciDevice): type = 'CopyEngine' diff --git a/src/dev/pci/PciDevice.py b/src/dev/pci/PciDevice.py index 21e6edf62..3f41de181 100644 --- a/src/dev/pci/PciDevice.py +++ b/src/dev/pci/PciDevice.py @@ -41,8 +41,8 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from Device import DmaDevice -from PciHost import PciHost +from m5.objects.Device import DmaDevice +from m5.objects.PciHost import PciHost class PciDevice(DmaDevice): type = 'PciDevice' diff --git a/src/dev/pci/PciHost.py b/src/dev/pci/PciHost.py index 28405c198..607b5f392 100644 --- a/src/dev/pci/PciHost.py +++ b/src/dev/pci/PciHost.py @@ -39,8 +39,8 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from Device import PioDevice -from Platform import Platform +from m5.objects.Device import PioDevice +from m5.objects.Platform import Platform class PciHost(PioDevice): type = 'PciHost' diff --git a/src/dev/serial/Terminal.py b/src/dev/serial/Terminal.py index 864491617..be7fbdc91 100644 --- a/src/dev/serial/Terminal.py +++ b/src/dev/serial/Terminal.py @@ -29,7 +29,8 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from Serial import SerialDevice + +from m5.objects.Serial import SerialDevice class Terminal(SerialDevice): type = 'Terminal' diff --git a/src/dev/serial/Uart.py b/src/dev/serial/Uart.py index 029d46c4f..a850f1534 100644 --- a/src/dev/serial/Uart.py +++ b/src/dev/serial/Uart.py @@ -40,8 +40,9 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from Serial import SerialDevice + +from m5.objects.Device import BasicPioDevice +from m5.objects.Serial import SerialDevice class Uart(BasicPioDevice): type = 'Uart' diff --git a/src/dev/sparc/T1000.py b/src/dev/sparc/T1000.py index 99f083450..d2040914c 100644 --- a/src/dev/sparc/T1000.py +++ b/src/dev/sparc/T1000.py @@ -28,10 +28,11 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr -from Platform import Platform -from Terminal import Terminal -from Uart import Uart8250 + +from m5.objects.Device import BasicPioDevice, PioDevice, IsaFake, BadAddr +from m5.objects.Platform import Platform +from m5.objects.Terminal import Terminal +from m5.objects.Uart import Uart8250 class MmDisk(BasicPioDevice): diff --git a/src/dev/storage/Ide.py b/src/dev/storage/Ide.py index fc3f356f0..65571b167 100644 --- a/src/dev/storage/Ide.py +++ b/src/dev/storage/Ide.py @@ -28,7 +28,7 @@ from m5.SimObject import SimObject from m5.params import * -from PciDevice import PciDevice +from m5.objects.PciDevice import PciDevice class IdeID(Enum): vals = ['master', 'slave'] diff --git a/src/dev/virtio/VirtIO.py b/src/dev/virtio/VirtIO.py index bf050fd47..fcb9235ec 100644 --- a/src/dev/virtio/VirtIO.py +++ b/src/dev/virtio/VirtIO.py @@ -40,8 +40,8 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from Device import PioDevice -from PciDevice import PciDevice +from m5.objects.Device import PioDevice +from m5.objects.PciDevice import PciDevice class VirtIODeviceBase(SimObject): diff --git a/src/dev/virtio/VirtIO9P.py b/src/dev/virtio/VirtIO9P.py index 623403d1d..02e50f301 100644 --- a/src/dev/virtio/VirtIO9P.py +++ b/src/dev/virtio/VirtIO9P.py @@ -39,7 +39,7 @@ from m5.params import * from m5.proxy import * -from VirtIO import VirtIODeviceBase +from m5.objects.VirtIO import VirtIODeviceBase class VirtIO9PBase(VirtIODeviceBase): type = 'VirtIO9PBase' diff --git a/src/dev/virtio/VirtIOBlock.py b/src/dev/virtio/VirtIOBlock.py index 1add847c7..5f68c00c2 100644 --- a/src/dev/virtio/VirtIOBlock.py +++ b/src/dev/virtio/VirtIOBlock.py @@ -39,7 +39,7 @@ from m5.params import * from m5.proxy import * -from VirtIO import VirtIODeviceBase +from m5.objects.VirtIO import VirtIODeviceBase class VirtIOBlock(VirtIODeviceBase): type = 'VirtIOBlock' diff --git a/src/dev/virtio/VirtIOConsole.py b/src/dev/virtio/VirtIOConsole.py index bce5e1de2..142bbc69e 100644 --- a/src/dev/virtio/VirtIOConsole.py +++ b/src/dev/virtio/VirtIOConsole.py @@ -39,8 +39,8 @@ from m5.params import * from m5.proxy import * -from VirtIO import VirtIODeviceBase -from Serial import SerialDevice +from m5.objects.VirtIO import VirtIODeviceBase +from m5.objects.Serial import SerialDevice class VirtIOConsole(VirtIODeviceBase): type = 'VirtIOConsole' diff --git a/src/dev/x86/Cmos.py b/src/dev/x86/Cmos.py index c0b2be58a..9bc395cb2 100644 --- a/src/dev/x86/Cmos.py +++ b/src/dev/x86/Cmos.py @@ -28,8 +28,8 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from X86IntPin import X86IntSourcePin +from m5.objects.Device import BasicPioDevice +from m5.objects.X86IntPin import X86IntSourcePin class Cmos(BasicPioDevice): type = 'Cmos' diff --git a/src/dev/x86/I8042.py b/src/dev/x86/I8042.py index 43e70d6e4..5615d3e9f 100644 --- a/src/dev/x86/I8042.py +++ b/src/dev/x86/I8042.py @@ -28,9 +28,9 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from X86IntPin import X86IntSourcePin -from PS2 import * +from m5.objects.Device import BasicPioDevice +from m5.objects.X86IntPin import X86IntSourcePin +from m5.objects.PS2 import * class I8042(BasicPioDevice): type = 'I8042' diff --git a/src/dev/x86/I82094AA.py b/src/dev/x86/I82094AA.py index 7e71cdfc1..d848904f0 100644 --- a/src/dev/x86/I82094AA.py +++ b/src/dev/x86/I82094AA.py @@ -28,8 +28,8 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from X86IntPin import X86IntSinkPin +from m5.objects.Device import BasicPioDevice +from m5.objects.X86IntPin import X86IntSinkPin class I82094AA(BasicPioDevice): type = 'I82094AA' diff --git a/src/dev/x86/I8237.py b/src/dev/x86/I8237.py index a4c5e3ad5..22e29ba5f 100644 --- a/src/dev/x86/I8237.py +++ b/src/dev/x86/I8237.py @@ -28,7 +28,7 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice +from m5.objects.Device import BasicPioDevice class I8237(BasicPioDevice): type = 'I8237' diff --git a/src/dev/x86/I8254.py b/src/dev/x86/I8254.py index 574dd81c2..f0a6b2222 100644 --- a/src/dev/x86/I8254.py +++ b/src/dev/x86/I8254.py @@ -28,8 +28,8 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from X86IntPin import X86IntSourcePin +from m5.objects.Device import BasicPioDevice +from m5.objects.X86IntPin import X86IntSourcePin class I8254(BasicPioDevice): type = 'I8254' diff --git a/src/dev/x86/I8259.py b/src/dev/x86/I8259.py index 4403c3f53..7066cb846 100644 --- a/src/dev/x86/I8259.py +++ b/src/dev/x86/I8259.py @@ -28,8 +28,8 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice -from X86IntPin import X86IntSourcePin, X86IntSinkPin +from m5.objects.Device import BasicPioDevice +from m5.objects.X86IntPin import X86IntSourcePin, X86IntSinkPin class X86I8259CascadeMode(Enum): map = {'I8259Master' : 0, diff --git a/src/dev/x86/Pc.py b/src/dev/x86/Pc.py index 4d20214ad..0e75a2e51 100644 --- a/src/dev/x86/Pc.py +++ b/src/dev/x86/Pc.py @@ -29,12 +29,12 @@ from m5.params import * from m5.proxy import * -from Device import IsaFake -from Platform import Platform -from SouthBridge import SouthBridge -from Terminal import Terminal -from Uart import Uart8250 -from PciHost import GenericPciHost +from m5.objects.Device import IsaFake +from m5.objects.Platform import Platform +from m5.objects.SouthBridge import SouthBridge +from m5.objects.Terminal import Terminal +from m5.objects.Uart import Uart8250 +from m5.objects.PciHost import GenericPciHost def x86IOAddress(port): IO_address_space_base = 0x8000000000000000 diff --git a/src/dev/x86/PcSpeaker.py b/src/dev/x86/PcSpeaker.py index f1c23157b..079a3d8da 100644 --- a/src/dev/x86/PcSpeaker.py +++ b/src/dev/x86/PcSpeaker.py @@ -28,7 +28,7 @@ from m5.params import * from m5.proxy import * -from Device import BasicPioDevice +from m5.objects.Device import BasicPioDevice class PcSpeaker(BasicPioDevice): type = 'PcSpeaker' diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py index 704656594..7029eb358 100644 --- a/src/dev/x86/SouthBridge.py +++ b/src/dev/x86/SouthBridge.py @@ -28,15 +28,15 @@ from m5.params import * from m5.proxy import * -from Cmos import Cmos -from I8042 import I8042 -from I82094AA import I82094AA -from I8237 import I8237 -from I8254 import I8254 -from I8259 import I8259 -from Ide import IdeController -from PcSpeaker import PcSpeaker -from X86IntPin import X86IntLine +from m5.objects.Cmos import Cmos +from m5.objects.I8042 import I8042 +from m5.objects.I82094AA import I82094AA +from m5.objects.I8237 import I8237 +from m5.objects.I8254 import I8254 +from m5.objects.I8259 import I8259 +from m5.objects.Ide import IdeController +from m5.objects.PcSpeaker import PcSpeaker +from m5.objects.X86IntPin import X86IntLine from m5.SimObject import SimObject def x86IOAddress(port): |