diff options
Diffstat (limited to 'src/dev')
55 files changed, 198 insertions, 201 deletions
diff --git a/src/dev/alpha/backdoor.hh b/src/dev/alpha/backdoor.hh index da6201059..59d800863 100644 --- a/src/dev/alpha/backdoor.hh +++ b/src/dev/alpha/backdoor.hh @@ -76,8 +76,8 @@ class AlphaBackdoor : public BasicPioDevice protected: struct Access : public AlphaAccess, public Serializable { - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; union { @@ -118,8 +118,8 @@ class AlphaBackdoor : public BasicPioDevice /** * standard serialization routines for checkpointing */ - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __DEV_ALPHA_BACKDOOR_HH__ diff --git a/src/dev/alpha/tsunami.hh b/src/dev/alpha/tsunami.hh index 19df8093e..9972ecc95 100644 --- a/src/dev/alpha/tsunami.hh +++ b/src/dev/alpha/tsunami.hh @@ -124,8 +124,8 @@ class Tsunami : public Platform */ virtual Addr calcPciMemAddr(Addr addr); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __DEV_TSUNAMI_HH__ diff --git a/src/dev/alpha/tsunami_cchip.hh b/src/dev/alpha/tsunami_cchip.hh index fdbe64ef1..45834f9ea 100644 --- a/src/dev/alpha/tsunami_cchip.hh +++ b/src/dev/alpha/tsunami_cchip.hh @@ -131,8 +131,8 @@ class TsunamiCChip : public BasicPioDevice */ void reqIPI(uint64_t ipreq); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __TSUNAMI_CCHIP_HH__ diff --git a/src/dev/alpha/tsunami_io.hh b/src/dev/alpha/tsunami_io.hh index 2b7f5484e..e1b05abe8 100644 --- a/src/dev/alpha/tsunami_io.hh +++ b/src/dev/alpha/tsunami_io.hh @@ -138,8 +138,8 @@ class TsunamiIO : public BasicPioDevice */ void clearPIC(uint8_t bitvector); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** * Start running. diff --git a/src/dev/alpha/tsunami_pchip.hh b/src/dev/alpha/tsunami_pchip.hh index 0eb992131..e37292d57 100644 --- a/src/dev/alpha/tsunami_pchip.hh +++ b/src/dev/alpha/tsunami_pchip.hh @@ -89,8 +89,8 @@ class TsunamiPChip : public BasicPioDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __TSUNAMI_PCHIP_HH__ diff --git a/src/dev/arm/energy_ctrl.hh b/src/dev/arm/energy_ctrl.hh index a1a362879..3b9f8883f 100644 --- a/src/dev/arm/energy_ctrl.hh +++ b/src/dev/arm/energy_ctrl.hh @@ -132,8 +132,8 @@ class EnergyCtrl : public BasicPioDevice */ virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; void startup(); void init(); diff --git a/src/dev/arm/flash_device.hh b/src/dev/arm/flash_device.hh index 891217cbf..9dfb22a72 100644 --- a/src/dev/arm/flash_device.hh +++ b/src/dev/arm/flash_device.hh @@ -62,11 +62,11 @@ class FlashDevice : public AbstractNVM ~FlashDevice(); /** Checkpoint functions*/ - DrainState drain() M5_ATTR_OVERRIDE; + DrainState drain() override; void checkDrain(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; private: /** Defines the possible actions to the flash*/ diff --git a/src/dev/arm/generic_timer.hh b/src/dev/arm/generic_timer.hh index 97823f05f..c606f1e60 100644 --- a/src/dev/arm/generic_timer.hh +++ b/src/dev/arm/generic_timer.hh @@ -93,8 +93,8 @@ class SystemCounter : public Serializable void setKernelControl(uint32_t val) { _regCntkctl = val; } uint32_t getKernelControl() { return _regCntkctl; } - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; private: // Disable copying @@ -189,8 +189,8 @@ class ArchTimer : public Serializable /// Returns the value of the counter which this timer relies on. uint64_t value() const; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; private: // Disable copying @@ -202,8 +202,8 @@ class GenericTimer : public SimObject public: GenericTimer(GenericTimerParams *p); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: void setMiscReg(int misc_reg, unsigned cpu, ArmISA::MiscReg val); @@ -262,10 +262,10 @@ class GenericTimerISA : public ArmISA::BaseISADevice GenericTimerISA(GenericTimer &_parent, unsigned _cpu) : parent(_parent), cpu(_cpu) {} - void setMiscReg(int misc_reg, ArmISA::MiscReg val) M5_ATTR_OVERRIDE { + void setMiscReg(int misc_reg, ArmISA::MiscReg val) override { parent.setMiscReg(misc_reg, cpu, val); } - ArmISA::MiscReg readMiscReg(int misc_reg) M5_ATTR_OVERRIDE { + ArmISA::MiscReg readMiscReg(int misc_reg) override { return parent.readMiscReg(misc_reg, cpu); } @@ -279,13 +279,13 @@ class GenericTimerMem : public PioDevice public: GenericTimerMem(GenericTimerMemParams *p); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: // PioDevice - AddrRangeList getAddrRanges() const M5_ATTR_OVERRIDE { return addrRanges; } - Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE; - Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE; + AddrRangeList getAddrRanges() const override { return addrRanges; } + Tick read(PacketPtr pkt) override; + Tick write(PacketPtr pkt) override; protected: uint64_t ctrlRead(Addr addr, size_t size) const; diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh index 17946145f..71ea2e761 100644 --- a/src/dev/arm/gic_pl390.hh +++ b/src/dev/arm/gic_pl390.hh @@ -300,8 +300,8 @@ class Pl390 : public BaseGic void driveIrqEn(bool state); /** @} */ - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; protected: /** Handle a read to the distributor poriton of the GIC diff --git a/src/dev/arm/gpu_nomali.hh b/src/dev/arm/gpu_nomali.hh index bc687c264..4e4f9dbcb 100644 --- a/src/dev/arm/gpu_nomali.hh +++ b/src/dev/arm/gpu_nomali.hh @@ -55,13 +55,13 @@ class NoMaliGpu : public PioDevice virtual ~NoMaliGpu(); public: /* Checkpointing */ - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: /* IO device interfaces */ - Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE; - Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE; - AddrRangeList getAddrRanges() const M5_ATTR_OVERRIDE; + Tick read(PacketPtr pkt) override; + Tick write(PacketPtr pkt) override; + AddrRangeList getAddrRanges() const override; private: /** diff --git a/src/dev/arm/hdlcd.hh b/src/dev/arm/hdlcd.hh index cb47b8522..3ce12a24d 100644 --- a/src/dev/arm/hdlcd.hh +++ b/src/dev/arm/hdlcd.hh @@ -95,18 +95,18 @@ class HDLcd: public AmbaDmaDevice HDLcd(const HDLcdParams *p); ~HDLcd(); - void regStats() M5_ATTR_OVERRIDE; + void regStats() override; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; - void drainResume() M5_ATTR_OVERRIDE; + void drainResume() override; public: // IO device interface - Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE; - Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE; + Tick read(PacketPtr pkt) override; + Tick write(PacketPtr pkt) override; - AddrRangeList getAddrRanges() const M5_ATTR_OVERRIDE { return addrRanges; } + AddrRangeList getAddrRanges() const override { return addrRanges; } protected: // Parameters VncInput *vnc; @@ -328,16 +328,16 @@ class HDLcd: public AmbaDmaDevice void dumpSettings(); protected: - bool nextPixel(Pixel &p) M5_ATTR_OVERRIDE { return parent.pxlNext(p); } + bool nextPixel(Pixel &p) override { return parent.pxlNext(p); } - void onVSyncBegin() M5_ATTR_OVERRIDE { return parent.pxlVSyncBegin(); } - void onVSyncEnd() M5_ATTR_OVERRIDE { return parent.pxlVSyncEnd(); } + void onVSyncBegin() override { return parent.pxlVSyncBegin(); } + void onVSyncEnd() override { return parent.pxlVSyncEnd(); } - void onUnderrun(unsigned x, unsigned y) M5_ATTR_OVERRIDE { + void onUnderrun(unsigned x, unsigned y) override { parent.pxlUnderrun(); } - void onFrameDone() M5_ATTR_OVERRIDE { parent.pxlFrameDone(); } + void onFrameDone() override { parent.pxlFrameDone(); } protected: HDLcd &parent; @@ -366,12 +366,12 @@ class HDLcd: public AmbaDmaDevice void abortFrame(); void dumpSettings(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; protected: - void onEndOfBlock() M5_ATTR_OVERRIDE; - void onIdle() M5_ATTR_OVERRIDE; + void onEndOfBlock() override; + void onIdle() override; HDLcd &parent; const size_t lineSize; diff --git a/src/dev/arm/kmi.hh b/src/dev/arm/kmi.hh index 9b30b3c15..e5c58f7d7 100644 --- a/src/dev/arm/kmi.hh +++ b/src/dev/arm/kmi.hh @@ -157,8 +157,8 @@ class Pl050 : public AmbaIntDevice, public VncKeyboard, public VncMouse virtual void mouseAt(uint16_t x, uint16_t y, uint8_t buttons); virtual void keyPress(uint32_t key, bool down); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __DEV_ARM_PL050_HH__ diff --git a/src/dev/arm/pl011.hh b/src/dev/arm/pl011.hh index b0f7d576d..936dd81ed 100644 --- a/src/dev/arm/pl011.hh +++ b/src/dev/arm/pl011.hh @@ -60,15 +60,15 @@ class Pl011 : public Uart, public AmbaDevice public: Pl011(const Pl011Params *p); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: // PioDevice - Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE; - Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE; + Tick read(PacketPtr pkt) override; + Tick write(PacketPtr pkt) override; public: // Uart - void dataAvailable() M5_ATTR_OVERRIDE; + void dataAvailable() override; protected: // Interrupt handling diff --git a/src/dev/arm/pl111.hh b/src/dev/arm/pl111.hh index 08d9147a4..d22c0883e 100644 --- a/src/dev/arm/pl111.hh +++ b/src/dev/arm/pl111.hh @@ -371,8 +371,8 @@ class Pl111: public AmbaDmaDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** * Determine the address ranges that this device responds to. diff --git a/src/dev/arm/rtc_pl031.hh b/src/dev/arm/rtc_pl031.hh index 406857e70..8c8fa1538 100644 --- a/src/dev/arm/rtc_pl031.hh +++ b/src/dev/arm/rtc_pl031.hh @@ -125,8 +125,8 @@ class PL031 : public AmbaIntDevice */ virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; diff --git a/src/dev/arm/rv_ctrl.hh b/src/dev/arm/rv_ctrl.hh index 905fe14d9..1a55025a8 100644 --- a/src/dev/arm/rv_ctrl.hh +++ b/src/dev/arm/rv_ctrl.hh @@ -171,17 +171,17 @@ class RealViewCtrl : public BasicPioDevice * @param pkt The memory request. * @param data Where to put the data. */ - Tick read(PacketPtr pkt) M5_ATTR_OVERRIDE; + Tick read(PacketPtr pkt) override; /** * All writes are simply ignored. * @param pkt The memory request. * @param data the data */ - Tick write(PacketPtr pkt) M5_ATTR_OVERRIDE; + Tick write(PacketPtr pkt) override; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos, @@ -206,14 +206,14 @@ class RealViewOsc RealViewOsc(RealViewOscParams *p); virtual ~RealViewOsc() {}; - void startup() M5_ATTR_OVERRIDE; + void startup() override; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: // RealViewCtrl::Device interface - uint32_t read() const M5_ATTR_OVERRIDE; - void write(uint32_t freq) M5_ATTR_OVERRIDE; + uint32_t read() const override; + void write(uint32_t freq) override; protected: void clockPeriod(Tick clock_period); diff --git a/src/dev/arm/timer_cpulocal.hh b/src/dev/arm/timer_cpulocal.hh index 73a2d4493..56bb359d9 100644 --- a/src/dev/arm/timer_cpulocal.hh +++ b/src/dev/arm/timer_cpulocal.hh @@ -145,8 +145,8 @@ class CpuLocalTimer : public BasicPioDevice /** Handle write for a single timer */ void write(PacketPtr pkt, Addr daddr); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; friend class CpuLocalTimer; }; @@ -186,8 +186,8 @@ class CpuLocalTimer : public BasicPioDevice */ virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; diff --git a/src/dev/arm/timer_sp804.hh b/src/dev/arm/timer_sp804.hh index c5b3bb633..73e27ca34 100644 --- a/src/dev/arm/timer_sp804.hh +++ b/src/dev/arm/timer_sp804.hh @@ -121,8 +121,8 @@ class Sp804 : public AmbaPioDevice /** Handle write for a single timer */ void write(PacketPtr pkt, Addr daddr); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; /** Pointer to the GIC for causing an interrupt */ @@ -160,8 +160,8 @@ class Sp804 : public AmbaPioDevice virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; diff --git a/src/dev/arm/ufs_device.hh b/src/dev/arm/ufs_device.hh index 716b1bdcb..8789cf575 100644 --- a/src/dev/arm/ufs_device.hh +++ b/src/dev/arm/ufs_device.hh @@ -173,10 +173,10 @@ class UFSHostDevice : public DmaDevice UFSHostDevice(const UFSHostDeviceParams* p); - DrainState drain() M5_ATTR_OVERRIDE; + DrainState drain() override; void checkDrain(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; private: /** diff --git a/src/dev/arm/vgic.hh b/src/dev/arm/vgic.hh index d44afd7a9..b365f0cf3 100644 --- a/src/dev/arm/vgic.hh +++ b/src/dev/arm/vgic.hh @@ -192,8 +192,8 @@ class VGic : public PioDevice uint8_t VMBP; uint8_t VMPriMask; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; struct std::array<vcpuIntData, VGIC_CPU_MAX> vcpuData; @@ -212,8 +212,8 @@ class VGic : public PioDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; private: Tick readVCpu(PacketPtr pkt); diff --git a/src/dev/copy_engine.hh b/src/dev/copy_engine.hh index db701d451..b33d1145d 100644 --- a/src/dev/copy_engine.hh +++ b/src/dev/copy_engine.hh @@ -106,11 +106,11 @@ class CopyEngine : public PciDevice void channelRead(PacketPtr pkt, Addr daddr, int size); void channelWrite(PacketPtr pkt, Addr daddr, int size); - DrainState drain() M5_ATTR_OVERRIDE; - void drainResume() M5_ATTR_OVERRIDE; + DrainState drain() override; + void drainResume() override; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; private: void fetchDescriptor(Addr address); @@ -204,8 +204,8 @@ class CopyEngine : public PciDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif //__DEV_COPY_ENGINE_HH__ diff --git a/src/dev/copy_engine_defs.hh b/src/dev/copy_engine_defs.hh index afefac2b5..9a88802ed 100644 --- a/src/dev/copy_engine_defs.hh +++ b/src/dev/copy_engine_defs.hh @@ -125,7 +125,7 @@ struct Regs : public Serializable { uint32_t attnStatus; // Read clears - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE + void serialize(CheckpointOut &cp) const override { SERIALIZE_SCALAR(chanCount); SERIALIZE_SCALAR(xferCap); @@ -133,7 +133,7 @@ struct Regs : public Serializable { SERIALIZE_SCALAR(attnStatus); } - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE + void unserialize(CheckpointIn &cp) override { UNSERIALIZE_SCALAR(chanCount); UNSERIALIZE_SCALAR(xferCap); @@ -197,7 +197,7 @@ struct ChanRegs : public Serializable { }; CHANERR error; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE + void serialize(CheckpointOut &cp) const override { paramOut(cp, "ctrl", ctrl._data); paramOut(cp, "status", status._data); @@ -207,7 +207,7 @@ struct ChanRegs : public Serializable { paramOut(cp, "error", error._data); } - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE + void unserialize(CheckpointIn &cp) override { paramIn(cp, "ctrl", ctrl._data); paramIn(cp, "status", status._data); diff --git a/src/dev/disk_image.hh b/src/dev/disk_image.hh index 25483eed5..01e32440d 100644 --- a/src/dev/disk_image.hh +++ b/src/dev/disk_image.hh @@ -36,8 +36,8 @@ #define __DISK_IMAGE_HH__ #include <fstream> +#include <unordered_map> -#include "base/hashmap.hh" #include "params/CowDiskImage.hh" #include "params/DiskImage.hh" #include "params/RawDiskImage.hh" @@ -111,7 +111,7 @@ class CowDiskImage : public DiskImage struct Sector { uint8_t data[SectorSize]; }; - typedef m5::hash_map<uint64_t, Sector *> SectorTable; + typedef std::unordered_map<uint64_t, Sector *> SectorTable; protected: std::string filename; @@ -129,8 +129,8 @@ class CowDiskImage : public DiskImage void save(const std::string &file) const; void writeback(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; virtual std::streampos size() const; diff --git a/src/dev/dma_device.hh b/src/dev/dma_device.hh index a7a03d520..273b21e2b 100644 --- a/src/dev/dma_device.hh +++ b/src/dev/dma_device.hh @@ -148,7 +148,7 @@ class DmaPort : public MasterPort, public Drainable bool dmaPending() const { return pendingCount > 0; } - DrainState drain() M5_ATTR_OVERRIDE; + DrainState drain() override; }; class DmaDevice : public PioDevice @@ -238,11 +238,11 @@ class DmaReadFifo : public Drainable, public Serializable ~DmaReadFifo(); public: // Serializable - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: // Drainable - DrainState drain() M5_ATTR_OVERRIDE; + DrainState drain() override; public: // FIFO access /** diff --git a/src/dev/etherlink.hh b/src/dev/etherlink.hh index 4bfb751b9..0012d0003 100644 --- a/src/dev/etherlink.hh +++ b/src/dev/etherlink.hh @@ -158,8 +158,8 @@ class EtherLink : public EtherObject virtual EtherInt *getEthPort(const std::string &if_name, int idx); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; diff --git a/src/dev/ethertap.hh b/src/dev/ethertap.hh index 9c21dfc03..b1fa08559 100644 --- a/src/dev/ethertap.hh +++ b/src/dev/ethertap.hh @@ -115,8 +115,8 @@ class EtherTap : public EtherObject virtual bool recvPacket(EthPacketPtr packet); virtual void sendDone(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; class EtherTapInt : public EtherInt diff --git a/src/dev/i2cbus.hh b/src/dev/i2cbus.hh index 3ebfa308b..2fe8052fd 100644 --- a/src/dev/i2cbus.hh +++ b/src/dev/i2cbus.hh @@ -146,8 +146,8 @@ class I2CBus : public BasicPioDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif //__DEV_I2CBUS diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh index 3a3efb795..5b2d60916 100644 --- a/src/dev/i8254xGBe.hh +++ b/src/dev/i8254xGBe.hh @@ -329,8 +329,8 @@ class IGbE : public EtherDevice void reset(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; virtual bool hasOutstandingEvents() { return wbEvent.scheduled() || fetchEvent.scheduled(); @@ -393,8 +393,8 @@ class IGbE : public EtherDevice virtual bool hasOutstandingEvents(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; friend class RxDescCache; @@ -504,8 +504,8 @@ class IGbE : public EtherDevice } EventWrapper<TxDescCache, &TxDescCache::nullCallback> nullEvent; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; friend class TxDescCache; @@ -535,11 +535,11 @@ class IGbE : public EtherDevice bool ethRxPkt(EthPacketPtr packet); void ethTxDone(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; - DrainState drain() M5_ATTR_OVERRIDE; - void drainResume() M5_ATTR_OVERRIDE; + DrainState drain() override; + void drainResume() override; }; diff --git a/src/dev/i8254xGBe_defs.hh b/src/dev/i8254xGBe_defs.hh index 92257aea7..79a9413da 100644 --- a/src/dev/i8254xGBe_defs.hh +++ b/src/dev/i8254xGBe_defs.hh @@ -759,7 +759,7 @@ struct Regs : public Serializable { uint32_t sw_fw_sync; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE + void serialize(CheckpointOut &cp) const override { paramOut(cp, "ctrl", ctrl._data); paramOut(cp, "sts", sts._data); @@ -805,7 +805,7 @@ struct Regs : public Serializable { SERIALIZE_SCALAR(sw_fw_sync); } - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE + void unserialize(CheckpointIn &cp) override { paramIn(cp, "ctrl", ctrl._data); paramIn(cp, "sts", sts._data); diff --git a/src/dev/ide_ctrl.hh b/src/dev/ide_ctrl.hh index 7917432e4..398cab299 100644 --- a/src/dev/ide_ctrl.hh +++ b/src/dev/ide_ctrl.hh @@ -154,7 +154,7 @@ class IdeController : public PciDevice Tick read(PacketPtr pkt); Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __IDE_CTRL_HH_ diff --git a/src/dev/ide_disk.hh b/src/dev/ide_disk.hh index 79e931a29..e1ea7a27d 100644 --- a/src/dev/ide_disk.hh +++ b/src/dev/ide_disk.hh @@ -365,8 +365,8 @@ class IdeDisk : public SimObject inline Addr pciToDma(Addr pciAddr); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; diff --git a/src/dev/mips/malta.hh b/src/dev/mips/malta.hh index c5ee92e3d..cbfa55703 100755 --- a/src/dev/mips/malta.hh +++ b/src/dev/mips/malta.hh @@ -135,8 +135,8 @@ class Malta : public Platform M5_DUMMY_RETURN } - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __DEV_MALTA_HH__ diff --git a/src/dev/mips/malta_cchip.hh b/src/dev/mips/malta_cchip.hh index 707cd1048..5f8baad81 100755 --- a/src/dev/mips/malta_cchip.hh +++ b/src/dev/mips/malta_cchip.hh @@ -133,8 +133,8 @@ class MaltaCChip : public BasicPioDevice */ void reqIPI(uint64_t ipreq); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __MALTA_CCHIP_HH__ diff --git a/src/dev/mips/malta_io.hh b/src/dev/mips/malta_io.hh index bea6733fc..f6fdfa53b 100755 --- a/src/dev/mips/malta_io.hh +++ b/src/dev/mips/malta_io.hh @@ -130,8 +130,8 @@ class MaltaIO : public BasicPioDevice /** Clear an Interrupt to the CPU */ void clearIntr(uint8_t interrupt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** * Start running. diff --git a/src/dev/mips/malta_pchip.hh b/src/dev/mips/malta_pchip.hh index 368faf9c5..b1303c9c7 100755 --- a/src/dev/mips/malta_pchip.hh +++ b/src/dev/mips/malta_pchip.hh @@ -88,8 +88,8 @@ class MaltaPChip : public BasicPioDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __TSUNAMI_PCHIP_HH__ diff --git a/src/dev/multi_etherlink.hh b/src/dev/multi_etherlink.hh index 7d1352d60..68e96f862 100644 --- a/src/dev/multi_etherlink.hh +++ b/src/dev/multi_etherlink.hh @@ -222,14 +222,14 @@ class MultiEtherLink : public EtherObject } virtual EtherInt *getEthPort(const std::string &if_name, - int idx) M5_ATTR_OVERRIDE; + int idx) override; - void memWriteback() M5_ATTR_OVERRIDE; - void init() M5_ATTR_OVERRIDE; - void startup() M5_ATTR_OVERRIDE; + void memWriteback() override; + void init() override; + void startup() override; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __DEV_MULTIETHERLINK_HH__ diff --git a/src/dev/multi_iface.hh b/src/dev/multi_iface.hh index 0e4859ecd..5c7834d51 100644 --- a/src/dev/multi_iface.hh +++ b/src/dev/multi_iface.hh @@ -275,7 +275,7 @@ class MultiIface : public Drainable * This is a global event so process() will be called by each * simulation threads. (See further comments in the .cc file.) */ - void process() M5_ATTR_OVERRIDE; + void process() override; /** * Schedule periodic sync when resuming from a checkpoint. */ @@ -471,7 +471,7 @@ class MultiIface : public Drainable */ void initRandom(); - DrainState drain() M5_ATTR_OVERRIDE; + DrainState drain() override; /** * Callback when draining is complete. diff --git a/src/dev/ns_gige.hh b/src/dev/ns_gige.hh index 08b02027a..0e6c1bd31 100644 --- a/src/dev/ns_gige.hh +++ b/src/dev/ns_gige.hh @@ -366,10 +366,10 @@ class NSGigE : public EtherDevBase bool recvPacket(EthPacketPtr packet); void transferDone(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; - void drainResume() M5_ATTR_OVERRIDE; + void drainResume() override; }; /* diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh index 903d83c77..2064de90e 100644 --- a/src/dev/pcidev.hh +++ b/src/dev/pcidev.hh @@ -249,14 +249,14 @@ class PciDevice : public DmaDevice * Serialize this object to the given output stream. * @param os The stream to serialize to. */ - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; /** * Reconstruct the state of this object from a checkpoint. * @param cp The checkpoint use. * @param section The section name of this object */ - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void unserialize(CheckpointIn &cp) override; virtual BaseSlavePort &getSlavePort(const std::string &if_name, diff --git a/src/dev/pixelpump.hh b/src/dev/pixelpump.hh index 582e1aa18..159ee79cb 100644 --- a/src/dev/pixelpump.hh +++ b/src/dev/pixelpump.hh @@ -63,8 +63,8 @@ struct DisplayTimings : public Serializable unsigned hbp, unsigned h_sync, unsigned hfp, unsigned vbp, unsigned v_sync, unsigned vfp); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** How many pixel clocks are required for one line? */ Cycles cyclesPerLine() const { @@ -151,8 +151,8 @@ class BasePixelPump BasePixelPump(EventManager &em, ClockDomain &pxl_clk, unsigned pixel_chunk); virtual ~BasePixelPump(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: // Public API /** Starting pushing pixels using the supplied display timings. */ @@ -257,14 +257,14 @@ class BasePixelPump public: PixelEvent(const char *name, BasePixelPump *parent, CallbackType func); - DrainState drain() M5_ATTR_OVERRIDE; - void drainResume() M5_ATTR_OVERRIDE; + DrainState drain() override; + void drainResume() override; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; - const std::string name() const M5_ATTR_OVERRIDE { return _name; } - void process() M5_ATTR_OVERRIDE { + const std::string name() const override { return _name; } + void process() override { (parent.*func)(); } diff --git a/src/dev/sinic.hh b/src/dev/sinic.hh index 41a629af1..96727b0ca 100644 --- a/src/dev/sinic.hh +++ b/src/dev/sinic.hh @@ -73,8 +73,8 @@ class Base : public EtherDevBase * Serialization stuff */ public: - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** * Construction/Destruction/Parameters @@ -271,7 +271,7 @@ class Device : public Base public: virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - virtual void drainResume() M5_ATTR_OVERRIDE; + virtual void drainResume() override; void prepareIO(ContextID cpu, int index); void prepareRead(ContextID cpu, int index); @@ -297,8 +297,8 @@ class Device : public Base * Serialization stuff */ public: - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; public: Device(const Params *p); diff --git a/src/dev/sparc/dtod.hh b/src/dev/sparc/dtod.hh index a7b451364..98208a992 100644 --- a/src/dev/sparc/dtod.hh +++ b/src/dev/sparc/dtod.hh @@ -63,8 +63,8 @@ class DumbTOD : public BasicPioDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __DEV_BADDEV_HH__ diff --git a/src/dev/sparc/iob.hh b/src/dev/sparc/iob.hh index 033ee3867..4772e8654 100644 --- a/src/dev/sparc/iob.hh +++ b/src/dev/sparc/iob.hh @@ -142,8 +142,8 @@ class Iob : public PioDevice AddrRangeList getAddrRanges() const; - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif //__DEV_SPARC_IOB_HH__ diff --git a/src/dev/sparc/mm_disk.hh b/src/dev/sparc/mm_disk.hh index 2de3cac7d..6242ed943 100644 --- a/src/dev/sparc/mm_disk.hh +++ b/src/dev/sparc/mm_disk.hh @@ -61,7 +61,7 @@ class MmDisk : public BasicPioDevice virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; }; #endif //__DEV_SPARC_MM_DISK_HH__ diff --git a/src/dev/tcp_iface.hh b/src/dev/tcp_iface.hh index d34d3d002..553f862ca 100644 --- a/src/dev/tcp_iface.hh +++ b/src/dev/tcp_iface.hh @@ -98,19 +98,18 @@ class TCPIface : public MultiIface virtual void sendRaw(void *buf, unsigned length, - const MultiHeaderPkt::AddressType dest_addr=nullptr) - M5_ATTR_OVERRIDE + const MultiHeaderPkt::AddressType dest_addr=nullptr) override { sendTCP(sock, buf, length); } - virtual bool recvRaw(void *buf, unsigned length) M5_ATTR_OVERRIDE + virtual bool recvRaw(void *buf, unsigned length) override { return recvTCP(sock, buf, length); } virtual void syncRaw(MultiHeaderPkt::MsgType sync_req, - Tick sync_tick) M5_ATTR_OVERRIDE; + Tick sync_tick) override; public: /** @@ -128,7 +127,7 @@ class TCPIface : public MultiIface unsigned multi_rank, Tick sync_start, Tick sync_repeat, EventManager *em); - ~TCPIface() M5_ATTR_OVERRIDE; + ~TCPIface() override; }; #endif diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh index 6b255594a..367d57f73 100644 --- a/src/dev/uart8250.hh +++ b/src/dev/uart8250.hh @@ -113,8 +113,8 @@ class Uart8250 : public Uart */ virtual bool intStatus() { return status ? true : false; } - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; #endif // __TSUNAMI_UART_HH__ diff --git a/src/dev/virtio/base.hh b/src/dev/virtio/base.hh index de68f92e1..4d4c16536 100644 --- a/src/dev/virtio/base.hh +++ b/src/dev/virtio/base.hh @@ -319,8 +319,8 @@ public: /** @{ * @name Checkpointing Interface */ - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** @{ * @name Low-level Device Interface @@ -595,8 +595,8 @@ class VirtIODeviceBase : public SimObject /** @{ * @name SimObject Interfaces */ - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** @} */ diff --git a/src/dev/virtio/fs9p.hh b/src/dev/virtio/fs9p.hh index a7fb780aa..9fb53dd2d 100644 --- a/src/dev/virtio/fs9p.hh +++ b/src/dev/virtio/fs9p.hh @@ -216,8 +216,8 @@ class VirtIO9PProxy : public VirtIO9PBase VirtIO9PProxy(Params *params); virtual ~VirtIO9PProxy(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; protected: void recvTMsg(const P9MsgHeader &header, const uint8_t *data, size_t size); diff --git a/src/dev/x86/cmos.hh b/src/dev/x86/cmos.hh index f0234da54..63a6d6a68 100644 --- a/src/dev/x86/cmos.hh +++ b/src/dev/x86/cmos.hh @@ -84,8 +84,8 @@ class Cmos : public BasicPioDevice virtual void startup(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; } // namespace X86ISA diff --git a/src/dev/x86/i8042.hh b/src/dev/x86/i8042.hh index fd32b4c53..bddbe9b27 100644 --- a/src/dev/x86/i8042.hh +++ b/src/dev/x86/i8042.hh @@ -120,10 +120,8 @@ class PS2Mouse : public PS2Device bool processData(uint8_t data); - void serialize(const std::string &base, - CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(const std::string &base, - CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(const std::string &base, CheckpointOut &cp) const override; + void unserialize(const std::string &base, CheckpointIn &cp) override; }; class PS2Keyboard : public PS2Device @@ -249,8 +247,8 @@ class I8042 : public BasicPioDevice Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; } // namespace X86ISA diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh index d047a49da..36986d2c4 100644 --- a/src/dev/x86/i82094aa.hh +++ b/src/dev/x86/i82094aa.hh @@ -105,14 +105,14 @@ class I82094AA : public BasicPioDevice, public IntDevice BaseMasterPort &getMasterPort(const std::string &if_name, PortID idx = InvalidPortID); - Tick recvResponse(PacketPtr pkt) M5_ATTR_OVERRIDE; + Tick recvResponse(PacketPtr pkt) override; void signalInterrupt(int line); void raiseInterruptPin(int number); void lowerInterruptPin(int number); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; } // namespace X86ISA diff --git a/src/dev/x86/i8237.hh b/src/dev/x86/i8237.hh index 481983b8e..49c1fd924 100644 --- a/src/dev/x86/i8237.hh +++ b/src/dev/x86/i8237.hh @@ -59,8 +59,8 @@ class I8237 : public BasicPioDevice Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; } // namespace X86ISA diff --git a/src/dev/x86/i8254.hh b/src/dev/x86/i8254.hh index c4f04bd42..86d4f0323 100644 --- a/src/dev/x86/i8254.hh +++ b/src/dev/x86/i8254.hh @@ -109,8 +109,8 @@ class I8254 : public BasicPioDevice pit.writeControl(val); } - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; virtual void startup(); diff --git a/src/dev/x86/i8259.hh b/src/dev/x86/i8259.hh index 567ad7a32..0b2cee01c 100644 --- a/src/dev/x86/i8259.hh +++ b/src/dev/x86/i8259.hh @@ -109,8 +109,8 @@ class I8259 : public BasicPioDevice, public IntDevice void lowerInterruptPin(int number); int getVector(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; } // namespace X86ISA diff --git a/src/dev/x86/speaker.hh b/src/dev/x86/speaker.hh index 3c879060f..9f1656370 100644 --- a/src/dev/x86/speaker.hh +++ b/src/dev/x86/speaker.hh @@ -73,8 +73,8 @@ class Speaker : public BasicPioDevice Tick write(PacketPtr pkt); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; }; } // namespace X86ISA |