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-rw-r--r--src/gpu-compute/hsail_code.cc17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/gpu-compute/hsail_code.cc b/src/gpu-compute/hsail_code.cc
index b0ddf0161..59faa67e9 100644
--- a/src/gpu-compute/hsail_code.cc
+++ b/src/gpu-compute/hsail_code.cc
@@ -84,6 +84,11 @@ HsailCode::init(const BrigDirectiveExecutable *code_dir, const BrigObject *obj,
const BrigBase *endPtr =
obj->getCodeSectionEntry(code_dir->nextModuleEntry);
+ // the instruction's byte address (relative to the base addr
+ // of the code section)
+ int inst_addr = 0;
+ // the index that points to the instruction in the instruction
+ // array
int inst_idx = 0;
std::vector<GPUStaticInst*> instructions;
int funcarg_size_scope = 0;
@@ -121,7 +126,7 @@ HsailCode::init(const BrigDirectiveExecutable *code_dir, const BrigObject *obj,
"kind_label, label is: %s \n",
obj->getString(lbl->name));
- labelMap.addLabel(lbl, inst_idx, obj);
+ labelMap.addLabel(lbl, inst_addr, obj);
}
break;
@@ -175,14 +180,16 @@ HsailCode::init(const BrigDirectiveExecutable *code_dir, const BrigObject *obj,
if (iptr) {
DPRINTF(HSAILObject, "Initializing code, processing inst "
- "#%d idx %d: OPCODE=%d\n",
- inst_idx, _insts.size(), instPtr->opcode);
+ "byte addr #%d idx %d: OPCODE=%d\n", inst_addr,
+ inst_idx, instPtr->opcode);
- TheGpuISA::RawMachInst inst_num = decoder.saveInst(iptr);
+ TheGpuISA::RawMachInst raw_inst = decoder.saveInst(iptr);
iptr->instNum(inst_idx);
- _insts.push_back(inst_num);
+ iptr->instAddr(inst_addr);
+ _insts.push_back(raw_inst);
instructions.push_back(iptr);
}
+ inst_addr += sizeof(TheGpuISA::RawMachInst);
++inst_idx;
} else if (entryPtr->kind >= BRIG_KIND_OPERAND_BEGIN &&
entryPtr->kind < BRIG_KIND_OPERAND_END) {