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-rw-r--r--src/gpu-compute/gpu_exec_context.cc4
-rw-r--r--src/gpu-compute/gpu_exec_context.hh5
-rw-r--r--src/gpu-compute/gpu_tlb.cc4
3 files changed, 7 insertions, 6 deletions
diff --git a/src/gpu-compute/gpu_exec_context.cc b/src/gpu-compute/gpu_exec_context.cc
index 013239757..76854f358 100644
--- a/src/gpu-compute/gpu_exec_context.cc
+++ b/src/gpu-compute/gpu_exec_context.cc
@@ -53,7 +53,7 @@ GPUExecContext::wavefront()
return wf;
}
-TheGpuISA::MiscReg
+RegVal
GPUExecContext::readMiscReg(int opIdx) const
{
assert(gpuISA);
@@ -61,7 +61,7 @@ GPUExecContext::readMiscReg(int opIdx) const
}
void
-GPUExecContext::writeMiscReg(int opIdx, TheGpuISA::MiscReg operandVal)
+GPUExecContext::writeMiscReg(int opIdx, RegVal operandVal)
{
assert(gpuISA);
gpuISA->writeMiscReg(opIdx, operandVal);
diff --git a/src/gpu-compute/gpu_exec_context.hh b/src/gpu-compute/gpu_exec_context.hh
index c5f9929b9..4f67dba47 100644
--- a/src/gpu-compute/gpu_exec_context.hh
+++ b/src/gpu-compute/gpu_exec_context.hh
@@ -37,6 +37,7 @@
#define __GPU_EXEC_CONTEXT_HH__
#include "arch/gpu_isa.hh"
+#include "base/types.hh"
#include "config/the_gpu_isa.hh"
class ComputeUnit;
@@ -49,8 +50,8 @@ class GPUExecContext
Wavefront* wavefront();
ComputeUnit* computeUnit();
- TheGpuISA::MiscReg readMiscReg(int opIdx) const;
- void writeMiscReg(int opIdx, TheGpuISA::MiscReg operandVal);
+ RegVal readMiscReg(int opIdx) const;
+ void writeMiscReg(int opIdx, RegVal operandVal);
protected:
ComputeUnit *cu;
diff --git a/src/gpu-compute/gpu_tlb.cc b/src/gpu-compute/gpu_tlb.cc
index dbf7d2628..9e07b0547 100644
--- a/src/gpu-compute/gpu_tlb.cc
+++ b/src/gpu-compute/gpu_tlb.cc
@@ -617,7 +617,7 @@ namespace X86ISA
//The index is multiplied by the size of a MiscReg so that
//any memory dependence calculations will not see these as
//overlapping.
- req->setPaddr(regNum * sizeof(MiscReg));
+ req->setPaddr(regNum * sizeof(RegVal));
return NoFault;
} else if (prefix == IntAddrPrefixIO) {
// TODO If CPL > IOPL or in virtual mode, check the I/O permission
@@ -630,7 +630,7 @@ namespace X86ISA
if (IOPort == 0xCF8 && req->getSize() == 4) {
req->setFlags(Request::MMAPPED_IPR);
- req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
+ req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(RegVal));
} else if ((IOPort & ~mask(2)) == 0xCFC) {
req->setFlags(Request::UNCACHEABLE);