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-rw-r--r--src/mem/SConscript3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 3b65131a2..1d3249918 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -43,6 +43,7 @@ SimObject('MemObject.py')
SimObject('SimpleMemory.py')
SimObject('XBar.py')
SimObject('HMCController.py')
+SimObject('SerialLink.py')
Source('abstract_mem.cc')
Source('addr_mapper.cc')
@@ -66,6 +67,7 @@ Source('stack_dist_calc.cc')
Source('tport.cc')
Source('xbar.cc')
Source('hmc_controller.cc')
+Source('serial_link.cc')
if env['TARGET_ISA'] != 'null':
Source('fs_translating_port_proxy.cc')
@@ -104,6 +106,7 @@ DebugFlag('PacketQueue')
DebugFlag('StackDist')
DebugFlag("DRAMSim2")
DebugFlag('HMCController')
+DebugFlag('SerialLink')
DebugFlag("MemChecker")
DebugFlag("MemCheckerMonitor")