summaryrefslogtreecommitdiff
path: root/src/mem/SConscript
diff options
context:
space:
mode:
Diffstat (limited to 'src/mem/SConscript')
-rw-r--r--src/mem/SConscript2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 50b00e8db..dd96879e6 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -65,6 +65,8 @@ if env['TARGET_ISA'] != 'null':
Source('fs_translating_port_proxy.cc')
Source('se_translating_port_proxy.cc')
Source('page_table.cc')
+if env['TARGET_ISA'] == 'x86':
+ Source('multi_level_page_table.cc')
if env['HAVE_DRAMSIM']:
SimObject('DRAMSim2.py')