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Diffstat (limited to 'src/mem/SConscript')
-rw-r--r-- | src/mem/SConscript | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index 6d225385b..e7d2c1bac 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -40,6 +40,8 @@ SimObject('AbstractMemory.py') SimObject('AddrMapper.py') SimObject('Bridge.py') SimObject('DRAMCtrl.py') +SimObject('ExternalMaster.py') +SimObject('ExternalSlave.py') SimObject('MemObject.py') SimObject('SimpleMemory.py') SimObject('XBar.py') @@ -50,6 +52,8 @@ Source('bridge.cc') Source('coherent_xbar.cc') Source('drampower.cc') Source('dram_ctrl.cc') +Source('external_master.cc') +Source('external_slave.cc') Source('mem_object.cc') Source('mport.cc') Source('noncoherent_xbar.cc') @@ -88,6 +92,7 @@ DebugFlag('CommMonitor') DebugFlag('DRAM') DebugFlag('DRAMPower') DebugFlag('DRAMState') +DebugFlag('ExternalPort') DebugFlag('LLSC') DebugFlag('MMU') DebugFlag('MemoryAccess') |