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Diffstat (limited to 'src/mem/SConscript')
| -rw-r--r-- | src/mem/SConscript | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index 7aba4f0e7..1c43975df 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -53,10 +53,12 @@ Source('se_translating_port_proxy.cc') if env['TARGET_ISA'] != 'no': SimObject('AbstractMemory.py') SimObject('SimpleMemory.py') + SimObject('SimpleDRAM.py') Source('abstract_mem.cc') Source('simple_mem.cc') Source('page_table.cc') Source('physical.cc') + Source('simple_dram.cc') DebugFlag('BaseBus') DebugFlag('BusAddrRanges') @@ -67,6 +69,8 @@ CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus', DebugFlag('Bridge') DebugFlag('CommMonitor') +DebugFlag('DRAM') +DebugFlag('DRAMWR') DebugFlag('LLSC') DebugFlag('MMU') DebugFlag('MemoryAccess') |