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Diffstat (limited to 'src/mem/SimpleMemory.py')
| -rw-r--r-- | src/mem/SimpleMemory.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/SimpleMemory.py b/src/mem/SimpleMemory.py index 9361b45d8..0cf6dece3 100644 --- a/src/mem/SimpleMemory.py +++ b/src/mem/SimpleMemory.py @@ -44,6 +44,7 @@ from AbstractMemory import * class SimpleMemory(AbstractMemory): type = 'SimpleMemory' + cxx_header = "mem/simple_mem.hh" port = SlavePort("Slave ports") latency = Param.Latency('30ns', "Request to response latency") latency_var = Param.Latency('0ns', "Request to response latency variance") |