diff options
Diffstat (limited to 'src/mem/XBar.py')
| -rw-r--r-- | src/mem/XBar.py | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mem/XBar.py b/src/mem/XBar.py index 8614519b3..674f9262e 100644 --- a/src/mem/XBar.py +++ b/src/mem/XBar.py @@ -100,6 +100,12 @@ class CoherentXBar(BaseXBar): # An optional snoop filter snoop_filter = Param.SnoopFilter(NULL, "Selected snoop filter") + # Determine how this crossbar handles packets where caches have + # already committed to responding, by establishing if the crossbar + # is the point of coherency or not. + point_of_coherency = Param.Bool(False, "Consider this crossbar the " \ + "point of coherency") + system = Param.System(Parent.any, "System that the crossbar belongs to.") class SnoopFilter(SimObject): @@ -147,6 +153,11 @@ class SystemXBar(CoherentXBar): response_latency = 2 snoop_response_latency = 4 + # This specialisation of the coherent crossbar is to be considered + # the point of coherency, as there are no (coherent) downstream + # caches. + point_of_coherency = True + # In addition to the system interconnect, we typically also have one # or more on-chip I/O crossbars. Note that at some point we might want # to also define an off-chip I/O crossbar such as PCIe. |