1 files changed, 58 insertions, 7 deletions

diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index 1b28a2319..c84d6a50a 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -60,12 +60,14 @@
 #include "debug/MemoryAccess.hh"
 #include "mem/abstract_mem.hh"
 #include "mem/packet_access.hh"
+#include "sim/system.hh"
 
 using namespace std;
 
 AbstractMemory::AbstractMemory(const Params *p) :
     MemObject(p), range(params()->range), pmemAddr(NULL),
-    confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map)
+    confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map),
+    _system(NULL)
 {
     if (size() % TheISA::PageBytes != 0)
         panic("Memory Size not divisible by page size\n");
@@ -116,54 +118,103 @@ AbstractMemory::regStats()
 {
     using namespace Stats;
 
+    assert(system());
+
     bytesRead
+        .init(system()->maxMasters())
         .name(name() + ".bytes_read")
         .desc("Number of bytes read from this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bytesRead.subname(i, system()->getMasterName(i));
+    }
     bytesInstRead
+        .init(system()->maxMasters())
         .name(name() + ".bytes_inst_read")
         .desc("Number of instructions bytes read from this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bytesInstRead.subname(i, system()->getMasterName(i));
+    }
     bytesWritten
+        .init(system()->maxMasters())
         .name(name() + ".bytes_written")
         .desc("Number of bytes written to this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bytesWritten.subname(i, system()->getMasterName(i));
+    }
     numReads
+        .init(system()->maxMasters())
         .name(name() + ".num_reads")
         .desc("Number of read requests responded to by this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        numReads.subname(i, system()->getMasterName(i));
+    }
     numWrites
+        .init(system()->maxMasters())
         .name(name() + ".num_writes")
         .desc("Number of write requests responded to by this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        numWrites.subname(i, system()->getMasterName(i));
+    }
     numOther
+        .init(system()->maxMasters())
         .name(name() + ".num_other")
         .desc("Number of other requests responded to by this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        numOther.subname(i, system()->getMasterName(i));
+    }
     bwRead
         .name(name() + ".bw_read")
         .desc("Total read bandwidth from this memory (bytes/s)")
         .precision(0)
         .prereq(bytesRead)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwRead.subname(i, system()->getMasterName(i));
+    }
+
     bwInstRead
         .name(name() + ".bw_inst_read")
         .desc("Instruction read bandwidth from this memory (bytes/s)")
         .precision(0)
         .prereq(bytesInstRead)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwInstRead.subname(i, system()->getMasterName(i));
+    }
     bwWrite
         .name(name() + ".bw_write")
         .desc("Write bandwidth from this memory (bytes/s)")
         .precision(0)
         .prereq(bytesWritten)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwWrite.subname(i, system()->getMasterName(i));
+    }
     bwTotal
         .name(name() + ".bw_total")
         .desc("Total bandwidth to/from this memory (bytes/s)")
         .precision(0)
         .prereq(bwTotal)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwTotal.subname(i, system()->getMasterName(i));
+    }
     bwRead = bytesRead / simSeconds;
     bwInstRead = bytesInstRead / simSeconds;
     bwWrite = bytesWritten / simSeconds;
@@ -336,7 +387,7 @@ AbstractMemory::access(PacketPtr pkt)
 
         assert(!pkt->req->isInstFetch());
         TRACE_PACKET("Read/Write");
-        numOther++;
+        numOther[pkt->req->masterId()]++;
     } else if (pkt->isRead()) {
         assert(!pkt->isWrite());
         if (pkt->isLLSC()) {
@@ -345,18 +396,18 @@ AbstractMemory::access(PacketPtr pkt)
         if (pmemAddr)
             memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
         TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
-        numReads++;
-        bytesRead += pkt->getSize();
+        numReads[pkt->req->masterId()]++;
+        bytesRead[pkt->req->masterId()] += pkt->getSize();
         if (pkt->req->isInstFetch())
-            bytesInstRead += pkt->getSize();
+            bytesInstRead[pkt->req->masterId()] += pkt->getSize();
     } else if (pkt->isWrite()) {
         if (writeOK(pkt)) {
             if (pmemAddr)
                 memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
             assert(!pkt->req->isInstFetch());
             TRACE_PACKET("Write");
-            numWrites++;
-            bytesWritten += pkt->getSize();
+            numWrites[pkt->req->masterId()]++;
+            bytesWritten[pkt->req->masterId()] += pkt->getSize();
         }
     } else if (pkt->isInvalidate()) {
         // no need to do anything