diff options
Diffstat (limited to 'src/mem/cache/base.hh')
| -rw-r--r-- | src/mem/cache/base.hh | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index d2cb11f33..6c87fad12 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -304,11 +304,6 @@ class BaseCache : public MemObject /** Do we forward snoops from mem side port through to cpu side port? */ const bool forwardSnoops; - /** Is this cache a toplevel cache (e.g. L1, I/O cache). If so we should - * never try to forward ownership and similar optimizations to the cpu - * side */ - const bool isTopLevel; - /** * Is this cache read only, for example the instruction cache, or * table-walker cache. A cache that is read only should never see |