summaryrefslogtreecommitdiff
path: root/src/mem/cache/base.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/mem/cache/base.hh')
-rw-r--r--src/mem/cache/base.hh13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 9275eb453..ffff6f058 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -381,12 +381,6 @@ class BaseCache : public MemObject
/** The average number of cycles blocked for each blocked cause. */
Stats::Formula avg_blocked;
- /** The number of fast writes (WH64) performed. */
- Stats::Scalar fastWrites;
-
- /** The number of cache copies performed. */
- Stats::Scalar cacheCopies;
-
/** The number of times a HW-prefetched block is evicted w/o reference. */
Stats::Scalar unusedPrefetches;
@@ -452,13 +446,6 @@ class BaseCache : public MemObject
/** The average overall latency of an MSHR miss. */
Stats::Formula overallAvgMshrUncacheableLatency;
- /** The number of times a thread hit its MSHR cap. */
- Stats::Vector mshr_cap_events;
- /** The number of times software prefetches caused the MSHR to block. */
- Stats::Vector soft_prefetch_mshr_full;
-
- Stats::Scalar mshr_no_allocate_misses;
-
/**
* @}
*/