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-rw-r--r--src/mem/cache/base.hh3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 6144fd584..11372418a 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -331,6 +331,9 @@ class BaseCache : public MemObject
/** To probe when a cache miss occurs */
ProbePointArg<PacketPtr> *ppMiss;
+ /** To probe when a cache fill occurs */
+ ProbePointArg<PacketPtr> *ppFill;
+
/**
* The writeAllocator drive optimizations for streaming writes.
* It first determines whether a WriteReq MSHR should be delayed,