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-rw-r--r--src/mem/cache/base_cache.cc4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index 0694aae6e..599958222 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -79,9 +79,7 @@ BaseCache::CachePort::recvTiming(PacketPtr pkt)
&& !pkt->isRead() && !pkt->isWrite()) {
//Upgrade or Invalidate
//Look into what happens if two slave caches on bus
- DPRINTF(Cache, "%s %x ? blk_addr: %x\n", pkt->cmdString(),
- pkt->getAddr() & (((ULL(1))<<48)-1),
- pkt->getAddr() & ~((Addr)cache->blkSize - 1));
+ DPRINTF(Cache, "%s %x ?\n", pkt->cmdString(), pkt->getAddr());
assert(!(pkt->flags & SATISFIED));
pkt->flags |= SATISFIED;