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-rw-r--r--src/mem/cache/cache.hh3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index a93b761ec..2a95dc53c 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -182,8 +182,7 @@ class Cache : public BaseCache
BlkType *handleFill(PacketPtr pkt, BlkType *blk,
PacketList &writebacks);
- bool satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk);
- bool satisfyTarget(MSHR::Target *target, BlkType *blk);
+ void satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk);
bool satisfyMSHR(MSHR *mshr, PacketPtr pkt, BlkType *blk);
void doTimingSupplyResponse(PacketPtr req_pkt, uint8_t *blk_data);