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Diffstat (limited to 'src/mem/cache/cache.hh')
| -rw-r--r-- | src/mem/cache/cache.hh | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh index 3076a56cf..0b04aadea 100644 --- a/src/mem/cache/cache.hh +++ b/src/mem/cache/cache.hh @@ -347,6 +347,26 @@ class Cache : public BaseCache cmd.isLLSC(); } + /* + * Handle a timing request that hit in the cache + * + * @param ptk The request packet + * @param blk The referenced block + * @param request_time The tick at which the block lookup is compete + */ + void handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time); + + /* + * Handle a timing request that missed in the cache + * + * @param ptk The request packet + * @param blk The referenced block + * @param forward_time The tick at which we can process dependent requests + * @param request_time The tick at which the block lookup is compete + */ + void handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, Tick forward_time, + Tick request_time); + /** * Performs the access specified by the request. * @param pkt The request to perform. |