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-rw-r--r--src/mem/cache/cache.hh6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 2a95dc53c..161fb801d 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -185,14 +185,16 @@ class Cache : public BaseCache
void satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk);
bool satisfyMSHR(MSHR *mshr, PacketPtr pkt, BlkType *blk);
- void doTimingSupplyResponse(PacketPtr req_pkt, uint8_t *blk_data);
+ void doTimingSupplyResponse(PacketPtr req_pkt, uint8_t *blk_data,
+ bool already_copied);
/**
* Sets the blk to the new state.
* @param blk The cache block being snooped.
* @param new_state The new coherence state for the block.
*/
- void handleSnoop(PacketPtr ptk, BlkType *blk, bool is_timing);
+ void handleSnoop(PacketPtr ptk, BlkType *blk,
+ bool is_timing, bool is_deferred);
/**
* Create a writeback request for the given block.