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-rw-r--r--src/mem/cache/cache.hh18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 24a067ece..4c70d3a40 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -246,6 +246,11 @@ class Cache : public BaseCache
bool recvTimingReq(PacketPtr pkt);
/**
+ * Insert writebacks into the write buffer
+ */
+ void doWritebacks(PacketList& writebacks, Tick forward_time);
+
+ /**
* Handles a response (cache line fill/write ack) from the bus.
* @param pkt The response packet
*/
@@ -308,6 +313,13 @@ class Cache : public BaseCache
*/
PacketPtr writebackBlk(CacheBlk *blk);
+ /**
+ * Create a CleanEvict request for the given block.
+ * @param blk The block to evict.
+ * @return The CleanEvict request for the block.
+ */
+ PacketPtr cleanEvictBlk(CacheBlk *blk);
+
void memWriteback();
void memInvalidate();
@@ -359,6 +371,12 @@ class Cache : public BaseCache
MSHR *getNextMSHR();
/**
+ * Send up a snoop request and find cached copies. If cached copies are
+ * found, set the BLOCK_CACHED flag in pkt.
+ */
+ bool isCachedAbove(const PacketPtr pkt) const;
+
+ /**
* Selects an outstanding request to service. Called when the
* cache gets granted the downstream bus in timing mode.
* @return The request to service, NULL if none found.