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-rw-r--r--src/mem/cache/cache_impl.hh9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 257b3ef33..130a909cc 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -92,9 +92,12 @@ Cache<TagStore>::getPort(const std::string &if_name, int idx)
} else if (if_name == "mem_side") {
return memSidePort;
} else if (if_name == "functional") {
- return new CpuSidePort(name() + "-cpu_side_funcport", this,
- "CpuSideFuncPort",
- std::vector<Range<Addr> >());
+ CpuSidePort *funcPort =
+ new CpuSidePort(name() + "-cpu_side_funcport", this,
+ "CpuSideFuncPort",
+ std::vector<Range<Addr> >());
+ funcPort->setOtherPort(memSidePort);
+ return funcPort;
} else {
panic("Port name %s unrecognized\n", if_name);
}