diff options
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index f1e9c3698..0cb33461b 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -77,7 +77,7 @@ doTimingAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide) template<class TagStore, class Buffering, class Coherence> Tick Cache<TagStore,Buffering,Coherence>:: -doAtomicAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide) +doAtomicAccess(Packet *pkt, bool isCpuSide) { if (isCpuSide) { @@ -97,18 +97,18 @@ doAtomicAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide) template<class TagStore, class Buffering, class Coherence> void Cache<TagStore,Buffering,Coherence>:: -doFunctionalAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide) +doFunctionalAccess(Packet *pkt, bool isCpuSide) { if (isCpuSide) { - probe(pkt, false); + probe(pkt, true); } else { if (pkt->isResponse()) handleResponse(pkt); else - snoopProbe(pkt, false); + snoopProbe(pkt, true); } } |