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-rw-r--r--src/mem/cache/cache_impl.hh13
1 files changed, 3 insertions, 10 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 46f4b0ebe..0d625054c 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -72,16 +72,9 @@ doTimingAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide)
if (pkt->isResponse())
handleResponse(pkt);
else {
- //Check if we are in phase1
- if (!snoopPhase2) {
- snoopPhase2 = true;
- }
- else {
- //Check if we should do the snoop
- if (pkt->flags && SNOOP_COMMIT)
- snoop(pkt);
- snoopPhase2 = false;
- }
+ //Check if we should do the snoop
+ if (pkt->flags && SNOOP_COMMIT)
+ snoop(pkt);
}
}
return true;