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-rw-r--r--src/mem/cache/miss/mshr.hh5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mem/cache/miss/mshr.hh b/src/mem/cache/miss/mshr.hh
index 06ef6e113..e850a8633 100644
--- a/src/mem/cache/miss/mshr.hh
+++ b/src/mem/cache/miss/mshr.hh
@@ -81,6 +81,7 @@ class MSHR : public Packet::SenderState
bool isReset() { return !needsExclusive && !hasUpgrade; }
void add(PacketPtr pkt, Tick readyTime, Counter order, bool cpuSide);
void replaceUpgrades();
+ void clearDownstreamPending();
};
/** A list of MSHRs. */
@@ -117,6 +118,8 @@ class MSHR : public Packet::SenderState
/** True if the request is uncacheable */
bool _isUncacheable;
+ bool downstreamPending;
+
bool pendingInvalidate;
bool pendingShared;
@@ -163,6 +166,8 @@ public:
void allocate(Addr addr, int size, PacketPtr pkt,
Tick when, Counter _order);
+ bool markInService();
+
/**
* Mark this MSHR as free.
*/