diff options
Diffstat (limited to 'src/mem/cache/miss')
| -rw-r--r-- | src/mem/cache/miss/blocking_buffer.cc | 9 | ||||
| -rw-r--r-- | src/mem/cache/miss/blocking_buffer.hh | 2 |
2 files changed, 7 insertions, 4 deletions
diff --git a/src/mem/cache/miss/blocking_buffer.cc b/src/mem/cache/miss/blocking_buffer.cc index 4a431d82d..a1af88341 100644 --- a/src/mem/cache/miss/blocking_buffer.cc +++ b/src/mem/cache/miss/blocking_buffer.cc @@ -32,6 +32,7 @@ * @file * Definitions of a simple buffer for a blocking cache. */ +#include <cstring> #include "mem/cache/base_cache.hh" #include "mem/cache/miss/blocking_buffer.hh" @@ -60,7 +61,7 @@ BlockingBuffer::handleMiss(PacketPtr &pkt, int blk_size, Tick time) wb.allocate(pkt->cmd, blk_addr, blk_size, pkt); } - memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), blk_size); + std::memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), blk_size); cache->setBlocked(Blocked_NoWBBuffers); cache->setMasterRequest(Request_WB, time); @@ -147,7 +148,7 @@ BlockingBuffer::handleResponse(PacketPtr &pkt, Tick time) PacketPtr target = ((MSHR*)(pkt->senderState))->getTarget(); ((MSHR*)(pkt->senderState))->popTarget(); if (pkt->isRead()) { - memcpy(target->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), target->getSize()); + std::memcpy(target->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), target->getSize()); } cache->respond(target, time); assert(!((MSHR*)(pkt->senderState))->hasTargets()); @@ -191,7 +192,7 @@ BlockingBuffer::doWriteback(Addr addr, PacketPtr pkt = new Packet(req, Packet::Writeback, -1); pkt->allocate(); if (data) { - memcpy(pkt->getPtr<uint8_t>(), data, size); + std::memcpy(pkt->getPtr<uint8_t>(), data, size); } if (compressed) { @@ -217,7 +218,7 @@ BlockingBuffer::doWriteback(PacketPtr &pkt) // Since allocate as buffer copies the request, // need to copy data here. - memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), pkt->getSize()); + std::memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), pkt->getSize()); cache->setBlocked(Blocked_NoWBBuffers); cache->setMasterRequest(Request_WB, curTick); diff --git a/src/mem/cache/miss/blocking_buffer.hh b/src/mem/cache/miss/blocking_buffer.hh index 205068a8c..24386a249 100644 --- a/src/mem/cache/miss/blocking_buffer.hh +++ b/src/mem/cache/miss/blocking_buffer.hh @@ -90,6 +90,7 @@ public: PacketPtr &target) { fatal("Unimplemented"); + M5_DUMMY_RETURN } /** @@ -201,6 +202,7 @@ public: MSHR* allocateTargetList(Addr addr) { fatal("Unimplemented"); + M5_DUMMY_RETURN } }; |