diff options
Diffstat (limited to 'src/mem/cache/prefetch/ghb_prefetcher.hh')
| -rw-r--r-- | src/mem/cache/prefetch/ghb_prefetcher.hh | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mem/cache/prefetch/ghb_prefetcher.hh b/src/mem/cache/prefetch/ghb_prefetcher.hh index 14f5747df..c558a3e64 100644 --- a/src/mem/cache/prefetch/ghb_prefetcher.hh +++ b/src/mem/cache/prefetch/ghb_prefetcher.hh @@ -43,16 +43,16 @@ /** * A template-policy based cache. The behavior of the cache can be altered by * supplying different template policies. TagStore handles all tag and data - * storage @sa TagStore. Buffering handles all misses and writes/writebacks + * storage @sa TagStore. MissBuffer handles all misses and writes/writebacks * @sa MissQueue. Coherence handles all coherence policy details @sa * UniCoherence, SimpleMultiCoherence. */ -template <class TagStore, class Buffering> -class GHBPrefetcher : public Prefetcher<TagStore, Buffering> +template <class TagStore> +class GHBPrefetcher : public Prefetcher<TagStore> { protected: - Buffering* mq; + MissBuffer* mq; TagStore* tags; Addr second_last_miss_addr[64/*MAX_CPUS*/]; @@ -67,7 +67,7 @@ class GHBPrefetcher : public Prefetcher<TagStore, Buffering> GHBPrefetcher(int size, bool pageStop, bool serialSquash, bool cacheCheckPush, bool onlyData, Tick latency, int degree, bool useCPUId) - :Prefetcher<TagStore, Buffering>(size, pageStop, serialSquash, + :Prefetcher<TagStore>(size, pageStop, serialSquash, cacheCheckPush, onlyData), latency(latency), degree(degree), useCPUId(useCPUId) { |