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Diffstat (limited to 'src/mem/cache/prefetch/stride.cc')
-rw-r--r--src/mem/cache/prefetch/stride.cc33
1 files changed, 26 insertions, 7 deletions
diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc
index cb67f50f8..fd8b20fcc 100644
--- a/src/mem/cache/prefetch/stride.cc
+++ b/src/mem/cache/prefetch/stride.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2012-2013 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2005 The Regents of The University of Michigan
* All rights reserved.
*
@@ -48,6 +60,7 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
}
Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
+ bool is_secure = pkt->isSecure();
MasterID master_id = useMasterId ? pkt->req->masterId() : 0;
Addr pc = pkt->req->getPC();
assert(master_id < Max_Contexts);
@@ -56,7 +69,8 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
/* Scan Table for instAddr Match */
std::list<StrideEntry*>::iterator iter;
for (iter = tab.begin(); iter != tab.end(); iter++) {
- if ((*iter)->instAddr == pc)
+ // Entries have to match on the security state as well
+ if ((*iter)->instAddr == pc && (*iter)->isSecure == is_secure)
break;
}
@@ -75,11 +89,13 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
(*iter)->confidence = 0;
}
- DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x stride %d (%s), conf %d\n",
- pc, blk_addr, new_stride, stride_match ? "match" : "change",
+ DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x (%s) stride %d (%s), "
+ "conf %d\n", pc, blk_addr, is_secure ? "s" : "ns", new_stride,
+ stride_match ? "match" : "change",
(*iter)->confidence);
(*iter)->missAddr = blk_addr;
+ (*iter)->isSecure = is_secure;
if ((*iter)->confidence <= 0)
return;
@@ -91,8 +107,8 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
pfSpanPage += degree - d + 1;
return;
} else {
- DPRINTF(HWPrefetch, " queuing prefetch to %x @ %d\n",
- new_addr, latency);
+ DPRINTF(HWPrefetch, " queuing prefetch to %x (%s) @ %d\n",
+ new_addr, is_secure ? "s" : "ns", latency);
addresses.push_back(new_addr);
delays.push_back(latency);
}
@@ -101,7 +117,8 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
// Miss in table
// Find lowest confidence and replace
- DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x\n", pc, blk_addr);
+ DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x (%s)\n", pc, blk_addr,
+ is_secure ? "s" : "ns");
if (tab.size() >= 256) { //set default table size is 256
std::list<StrideEntry*>::iterator min_pos = tab.begin();
@@ -112,7 +129,8 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
min_conf = (*iter)->confidence;
}
}
- DPRINTF(HWPrefetch, " replacing PC %x\n", (*min_pos)->instAddr);
+ DPRINTF(HWPrefetch, " replacing PC %x (%s)\n",
+ (*min_pos)->instAddr, (*min_pos)->isSecure ? "s" : "ns");
// free entry and delete it
delete *min_pos;
@@ -122,6 +140,7 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
StrideEntry *new_entry = new StrideEntry;
new_entry->instAddr = pc;
new_entry->missAddr = blk_addr;
+ new_entry->isSecure = is_secure;
new_entry->stride = 0;
new_entry->confidence = 0;
tab.push_back(new_entry);