diff options
Diffstat (limited to 'src/mem/cache/prefetch/stride.hh')
-rw-r--r-- | src/mem/cache/prefetch/stride.hh | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/mem/cache/prefetch/stride.hh b/src/mem/cache/prefetch/stride.hh index 4738fd9bc..6ccd32b91 100644 --- a/src/mem/cache/prefetch/stride.hh +++ b/src/mem/cache/prefetch/stride.hh @@ -36,36 +36,36 @@ #ifndef __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__ #define __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__ +#include <limits.h> #include "mem/cache/prefetch/base.hh" class StridePrefetcher : public BasePrefetcher { protected: - class strideEntry + static const int Max_Contexts = 64; + + // These constants need to be changed with the type of the + // 'confidence' field below. + static const int Max_Conf = INT_MAX; + static const int Min_Conf = INT_MIN; + + class StrideEntry { public: - Addr IAddr; - Addr MAddr; + Addr instAddr; + Addr missAddr; int stride; - int64_t confidence; - -/* bool operator < (strideEntry a,strideEntry b) - { - if (a.confidence == b.confidence) { - return true; //?????? - } - else return a.confidence < b.confidence; - }*/ + int confidence; }; - Addr* lastMissAddr[64/*MAX_CPUS*/]; - std::list<strideEntry*> table[64/*MAX_CPUS*/]; + Addr *lastMissAddr[Max_Contexts]; + + std::list<StrideEntry*> table[Max_Contexts]; Tick latency; int degree; bool useContextId; - public: StridePrefetcher(const BaseCacheParams *p) |