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Diffstat (limited to 'src/mem/cache/prefetch')
-rw-r--r--src/mem/cache/prefetch/base_prefetcher.cc2
-rw-r--r--src/mem/cache/prefetch/base_prefetcher.hh2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/cache/prefetch/base_prefetcher.cc b/src/mem/cache/prefetch/base_prefetcher.cc
index 897551989..5e50c48bd 100644
--- a/src/mem/cache/prefetch/base_prefetcher.cc
+++ b/src/mem/cache/prefetch/base_prefetcher.cc
@@ -198,7 +198,7 @@ BasePrefetcher::handleMiss(Packet * &pkt, Tick time)
}
//Check if it is already in the miss_queue
- if (inMissQueue(prefetch->getAddr(), prefetch->req->getAsid())) {
+ if (inMissQueue(prefetch->getAddr())) {
addr++;
delay++;
continue;
diff --git a/src/mem/cache/prefetch/base_prefetcher.hh b/src/mem/cache/prefetch/base_prefetcher.hh
index 3e4fc89d1..d7ea41961 100644
--- a/src/mem/cache/prefetch/base_prefetcher.hh
+++ b/src/mem/cache/prefetch/base_prefetcher.hh
@@ -108,7 +108,7 @@ class BasePrefetcher
virtual bool inCache(Packet * &pkt) = 0;
- virtual bool inMissQueue(Addr address, int asid) = 0;
+ virtual bool inMissQueue(Addr address) = 0;
std::list<Packet *>::iterator inPrefetch(Addr address);
};