diff options
Diffstat (limited to 'src/mem/cache/queue.hh')
| -rw-r--r-- | src/mem/cache/queue.hh | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/mem/cache/queue.hh b/src/mem/cache/queue.hh index f6941e64a..f603ea84e 100644 --- a/src/mem/cache/queue.hh +++ b/src/mem/cache/queue.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012-2013, 2015-2016 ARM Limited + * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -148,12 +148,15 @@ class Queue : public Drainable } /** - * Find the first WriteQueueEntry that matches the provided address. + * Find the first entry that matches the provided address. + * * @param blk_addr The block address to find. * @param is_secure True if the target memory space is secure. + * @param ignore_uncacheable Should uncacheables be ignored or not * @return Pointer to the matching WriteQueueEntry, null if not found. */ - Entry* findMatch(Addr blk_addr, bool is_secure) const + Entry* findMatch(Addr blk_addr, bool is_secure, + bool ignore_uncacheable = true) const { for (const auto& entry : allocatedList) { // we ignore any entries allocated for uncacheable @@ -162,8 +165,8 @@ class Queue : public Drainable // uncacheable entries, and we do not want normal // cacheable accesses being added to an WriteQueueEntry // serving an uncacheable access - if (!entry->isUncacheable() && entry->blkAddr == blk_addr && - entry->isSecure == is_secure) { + if (!(ignore_uncacheable && entry->isUncacheable()) && + entry->blkAddr == blk_addr && entry->isSecure == is_secure) { return entry; } } |