summaryrefslogtreecommitdiff
path: root/src/mem/cache/tags/Tags.py
diff options
context:
space:
mode:
Diffstat (limited to 'src/mem/cache/tags/Tags.py')
-rw-r--r--src/mem/cache/tags/Tags.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mem/cache/tags/Tags.py b/src/mem/cache/tags/Tags.py
index 6c0b85044..b19010f52 100644
--- a/src/mem/cache/tags/Tags.py
+++ b/src/mem/cache/tags/Tags.py
@@ -57,6 +57,10 @@ class BaseTags(ClockedObject):
data_latency = Param.Cycles(Parent.data_latency,
"The data access latency for this cache")
+ # Get the warmup percentage from the parent (cache)
+ warmup_percentage = Param.Percent(Parent.warmup_percentage,
+ "Percentage of tags to be touched to warm up the cache")
+
sequential_access = Param.Bool(Parent.sequential_access,
"Whether to access tags and data sequentially")