diff options
Diffstat (limited to 'src/mem/cache/tags/fa_lru.cc')
| -rw-r--r-- | src/mem/cache/tags/fa_lru.cc | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 0d6a3392d..cdd0db216 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -186,6 +186,16 @@ FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat, int context_src, FALRUBlk* blk = hashLookup(blkAddr); if (blk && blk->isValid()) { + // If a cache hit + lat = accessLatency; + // Check if the block to be accessed is available. If not, + // apply the accessLatency on top of block->whenReady. + if (blk->whenReady > curTick() && + cache->ticksToCycles(blk->whenReady - curTick()) > + accessLatency) { + lat = cache->ticksToCycles(blk->whenReady - curTick()) + + accessLatency; + } assert(blk->tag == blkAddr); tmp_in_cache = blk->inCache; for (unsigned i = 0; i < numCaches; i++) { @@ -200,6 +210,8 @@ FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat, int context_src, moveToHead(blk); } } else { + // If a cache miss + lat = lookupLatency; blk = nullptr; for (unsigned i = 0; i <= numCaches; ++i) { misses[i]++; @@ -209,7 +221,6 @@ FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat, int context_src, *inCache = tmp_in_cache; } - lat = accessLatency; //assert(check()); return blk; } |