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Diffstat (limited to 'src/mem/cache/tags/fa_lru.cc')
-rw-r--r--src/mem/cache/tags/fa_lru.cc18
1 files changed, 5 insertions, 13 deletions
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 2c92a940f..964846871 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -153,30 +153,22 @@ FALRU::accessBlock(Addr addr, bool is_secure, Cycles &lat,
CachesMask mask = 0;
FALRUBlk* blk = static_cast<FALRUBlk*>(findBlock(addr, is_secure));
+ // If a cache hit
if (blk && blk->isValid()) {
- // If a cache hit
- lat = accessLatency;
- // Check if the block to be accessed is available. If not,
- // apply the accessLatency on top of block->whenReady.
- if (blk->whenReady > curTick() &&
- cache->ticksToCycles(blk->whenReady - curTick()) >
- accessLatency) {
- lat = cache->ticksToCycles(blk->whenReady - curTick()) +
- accessLatency;
- }
mask = blk->inCachesMask;
moveToHead(blk);
- } else {
- // If a cache miss
- lat = lookupLatency;
}
+
if (in_caches_mask) {
*in_caches_mask = mask;
}
cacheTracking.recordAccess(blk);
+ // The tag lookup latency is the same for a hit or a miss
+ lat = lookupLatency;
+
return blk;
}