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-rw-r--r--src/mem/cache/tags/SConscript2
-rw-r--r--src/mem/cache/tags/Tags.py13
-rw-r--r--src/mem/cache/tags/base.hh11
-rw-r--r--src/mem/cache/tags/base_set_assoc.cc9
-rw-r--r--src/mem/cache/tags/base_set_assoc.hh60
-rw-r--r--src/mem/cache/tags/fa_lru.cc3
-rw-r--r--src/mem/cache/tags/fa_lru.hh9
-rw-r--r--src/mem/cache/tags/lru.cc120
-rw-r--r--src/mem/cache/tags/lru.hh78
-rw-r--r--src/mem/cache/tags/random_repl.cc105
-rw-r--r--src/mem/cache/tags/random_repl.hh78
11 files changed, 57 insertions, 431 deletions
diff --git a/src/mem/cache/tags/SConscript b/src/mem/cache/tags/SConscript
index 1412286a7..9758b566e 100644
--- a/src/mem/cache/tags/SConscript
+++ b/src/mem/cache/tags/SConscript
@@ -34,6 +34,4 @@ SimObject('Tags.py')
Source('base.cc')
Source('base_set_assoc.cc')
-Source('lru.cc')
-Source('random_repl.cc')
Source('fa_lru.cc')
diff --git a/src/mem/cache/tags/Tags.py b/src/mem/cache/tags/Tags.py
index b19010f52..ff4eff44e 100644
--- a/src/mem/cache/tags/Tags.py
+++ b/src/mem/cache/tags/Tags.py
@@ -66,19 +66,12 @@ class BaseTags(ClockedObject):
class BaseSetAssoc(BaseTags):
type = 'BaseSetAssoc'
- abstract = True
cxx_header = "mem/cache/tags/base_set_assoc.hh"
assoc = Param.Int(Parent.assoc, "associativity")
-class LRU(BaseSetAssoc):
- type = 'LRU'
- cxx_class = 'LRU'
- cxx_header = "mem/cache/tags/lru.hh"
-
-class RandomRepl(BaseSetAssoc):
- type = 'RandomRepl'
- cxx_class = 'RandomRepl'
- cxx_header = "mem/cache/tags/random_repl.hh"
+ # Get replacement policy from the parent (cache)
+ replacement_policy = Param.BaseReplacementPolicy(
+ Parent.replacement_policy, "Replacement policy")
class FALRU(BaseTags):
type = 'FALRU'
diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh
index 9e7242c1b..74fc7e0d0 100644
--- a/src/mem/cache/tags/base.hh
+++ b/src/mem/cache/tags/base.hh
@@ -54,6 +54,7 @@
#include "base/callback.hh"
#include "base/statistics.hh"
#include "mem/cache/blk.hh"
+#include "mem/cache/replacement_policies/base.hh"
#include "params/BaseTags.hh"
#include "sim/clocked_object.hh"
@@ -249,6 +250,14 @@ class BaseTags : public ClockedObject
occupancies[blk->srcMasterId]--;
}
+ /**
+ * Find replacement victim based on address.
+ *
+ * @param addr Address to find a victim for.
+ * @return Cache block to be replaced.
+ */
+ virtual CacheBlk* findVictim(Addr addr) = 0;
+
virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) = 0;
virtual Addr extractTag(Addr addr) const = 0;
@@ -263,8 +272,6 @@ class BaseTags : public ClockedObject
*/
virtual Addr regenerateBlkAddr(const CacheBlk* blk) const = 0;
- virtual CacheBlk* findVictim(Addr addr) = 0;
-
virtual int extractSet(Addr addr) const = 0;
virtual void forEachBlk(CacheBlkVisitor &visitor) = 0;
diff --git a/src/mem/cache/tags/base_set_assoc.cc b/src/mem/cache/tags/base_set_assoc.cc
index 61764fe91..2475e6fc0 100644
--- a/src/mem/cache/tags/base_set_assoc.cc
+++ b/src/mem/cache/tags/base_set_assoc.cc
@@ -60,7 +60,8 @@ BaseSetAssoc::BaseSetAssoc(const Params *p)
dataBlks(new uint8_t[p->size]), // Allocate data storage in one big chunk
numSets(p->size / (p->block_size * p->assoc)),
sequentialAccess(p->sequential_access),
- sets(p->size / (p->block_size * p->assoc))
+ sets(p->size / (p->block_size * p->assoc)),
+ replacementPolicy(p->replacement_policy)
{
// Check parameters
if (blkSize < 4 || !isPowerOf2(blkSize)) {
@@ -184,3 +185,9 @@ BaseSetAssoc::computeStats()
}
}
}
+
+BaseSetAssoc *
+BaseSetAssocParams::create()
+{
+ return new BaseSetAssoc(this);
+}
diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh
index 1fd739110..f7b386a92 100644
--- a/src/mem/cache/tags/base_set_assoc.hh
+++ b/src/mem/cache/tags/base_set_assoc.hh
@@ -64,14 +64,9 @@
* A BaseSetAssoc cache tag store.
* @sa \ref gem5MemorySystem "gem5 Memory System"
*
- * The BaseSetAssoc tags provide a base, as well as the functionality
- * common to any set associative tags. Any derived class must implement
- * the methods related to the specifics of the actual replacment policy.
- * These are:
- *
- * BlkType* accessBlock();
- * BlkType* findVictim();
- * void insertBlock();
+ * The BaseSetAssoc placement policy divides the cache into s sets of w
+ * cache lines (ways). A cache line is mapped onto a set, and can be placed
+ * into any of the ways of this set.
*/
class BaseSetAssoc : public BaseTags
{
@@ -109,7 +104,10 @@ class BaseSetAssoc : public BaseTags
/** Mask out all bits that aren't part of the set index. */
unsigned setMask;
-public:
+ /** Replacement policy */
+ BaseReplacementPolicy *replacementPolicy;
+
+ public:
/** Convenience typedef. */
typedef BaseSetAssocParams Params;
@@ -169,7 +167,9 @@ public:
lat = cache->ticksToCycles(blk->whenReady - curTick()) +
accessLatency;
}
- blk->refCount += 1;
+
+ // Update replacement data of accessed block
+ replacementPolicy->touch(blk);
} else {
// If a cache miss
lat = lookupLatency;
@@ -189,25 +189,29 @@ public:
CacheBlk* findBlock(Addr addr, bool is_secure) const override;
/**
- * Find an invalid block to evict for the address provided.
- * If there are no invalid blocks, this will return the block
- * in the least-recently-used position.
- * @param addr The addr to a find a replacement candidate for.
- * @return The candidate block.
+ * Find replacement victim based on address.
+ *
+ * @param addr Address to find a victim for.
+ * @return Cache block to be replaced.
*/
CacheBlk* findVictim(Addr addr) override
{
- BlkType *blk = nullptr;
- int set = extractSet(addr);
-
- // prefer to evict an invalid block
- for (int i = 0; i < allocAssoc; ++i) {
- blk = sets[set].blks[i];
- if (!blk->isValid())
- break;
- }
+ // Choose replacement victim from replacement candidates
+ return replacementPolicy->getVictim(getPossibleLocations(addr));
+ }
- return blk;
+ /**
+ * Find all possible block locations for insertion and replacement of
+ * an address. Should be called immediately before ReplacementPolicy's
+ * findVictim() not to break cache resizing.
+ * Returns blocks in all ways belonging to the set of the address.
+ *
+ * @param addr The addr to a find possible locations for.
+ * @return The possible locations.
+ */
+ const std::vector<CacheBlk*> getPossibleLocations(Addr addr)
+ {
+ return sets[extractSet(addr)].blks;
}
/**
@@ -242,9 +246,8 @@ public:
}
// Previous block, if existed, has been removed, and now we have
- // to insert the new one and mark it as touched
+ // to insert the new one
tagsInUse++;
- blk->isTouched = true;
// Set tag for new block. Caller is responsible for setting status.
blk->tag = extractTag(addr);
@@ -254,11 +257,12 @@ public:
occupancies[master_id]++;
blk->srcMasterId = master_id;
blk->task_id = task_id;
- blk->tickInserted = curTick();
// We only need to write into one tag and one data block.
tagAccesses += 1;
dataAccesses += 1;
+
+ replacementPolicy->reset(blk);
}
/**
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index d40398975..a38d0bf34 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -98,7 +98,6 @@ FALRU::FALRU(const Params *p)
}
blks[i].prev = &(blks[i-1]);
blks[i].next = &(blks[i+1]);
- blks[i].isTouched = false;
blks[i].set = 0;
blks[i].way = i;
}
@@ -255,13 +254,13 @@ FALRU::findVictim(Addr addr)
replacements[0]++;
} else {
tagsInUse++;
- blk->isTouched = true;
if (!warmedUp && tagsInUse.value() >= warmupBound) {
warmedUp = true;
warmupCycle = curTick();
}
}
//assert(check());
+
return blk;
}
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 559f56e28..7f3f99ae0 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -67,8 +67,6 @@ public:
FALRUBlk *prev;
/** The next block in LRU order. */
FALRUBlk *next;
- /** Has this block been touched? */
- bool isTouched;
/**
* A bit mask of the sizes of cache that this block is resident in.
@@ -204,9 +202,10 @@ public:
CacheBlk* findBlock(Addr addr, bool is_secure) const override;
/**
- * Find a replacement block for the address provided.
- * @param pkt The request to a find a replacement candidate for.
- * @return The block to place the replacement in.
+ * Find replacement victim based on address.
+ *
+ * @param addr Address to find a victim for.
+ * @return Cache block to be replaced.
*/
CacheBlk* findVictim(Addr addr) override;
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
deleted file mode 100644
index 4302a8de6..000000000
--- a/src/mem/cache/tags/lru.cc
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2012-2013 ARM Limited
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Erik Hallnor
- */
-
-/**
- * @file
- * Definitions of a LRU tag store.
- */
-
-#include "mem/cache/tags/lru.hh"
-
-#include "debug/CacheRepl.hh"
-#include "mem/cache/base.hh"
-
-LRU::LRU(const Params *p)
- : BaseSetAssoc(p)
-{
-}
-
-CacheBlk*
-LRU::accessBlock(Addr addr, bool is_secure, Cycles &lat)
-{
- CacheBlk *blk = BaseSetAssoc::accessBlock(addr, is_secure, lat);
-
- if (blk != nullptr) {
- // move this block to head of the MRU list
- sets[blk->set].moveToHead(blk);
- DPRINTF(CacheRepl, "set %x: moving blk %x (%s) to MRU\n",
- blk->set, regenerateBlkAddr(blk),
- is_secure ? "s" : "ns");
- }
-
- return blk;
-}
-
-CacheBlk*
-LRU::findVictim(Addr addr)
-{
- int set = extractSet(addr);
- // grab a replacement candidate
- BlkType *blk = nullptr;
- for (int i = assoc - 1; i >= 0; i--) {
- BlkType *b = sets[set].blks[i];
- if (b->way < allocAssoc) {
- blk = b;
- break;
- }
- }
- assert(!blk || blk->way < allocAssoc);
-
- if (blk && blk->isValid()) {
- DPRINTF(CacheRepl, "set %x: selecting blk %x for replacement\n",
- set, regenerateBlkAddr(blk));
- }
-
- return blk;
-}
-
-void
-LRU::insertBlock(PacketPtr pkt, BlkType *blk)
-{
- BaseSetAssoc::insertBlock(pkt, blk);
-
- int set = extractSet(pkt->getAddr());
- sets[set].moveToHead(blk);
-}
-
-void
-LRU::invalidate(CacheBlk *blk)
-{
- BaseSetAssoc::invalidate(blk);
-
- // should be evicted before valid blocks
- int set = blk->set;
- sets[set].moveToTail(blk);
-}
-
-LRU*
-LRUParams::create()
-{
- return new LRU(this);
-}
diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh
deleted file mode 100644
index 1fbe4eb6d..000000000
--- a/src/mem/cache/tags/lru.hh
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2012-2013 ARM Limited
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Erik Hallnor
- */
-
-/**
- * @file
- * Declaration of a LRU tag store.
- * The LRU tags guarantee that the true least-recently-used way in
- * a set will always be evicted.
- */
-
-#ifndef __MEM_CACHE_TAGS_LRU_HH__
-#define __MEM_CACHE_TAGS_LRU_HH__
-
-#include "mem/cache/tags/base_set_assoc.hh"
-#include "params/LRU.hh"
-
-class LRU : public BaseSetAssoc
-{
- public:
- /** Convenience typedef. */
- typedef LRUParams Params;
-
- /**
- * Construct and initialize this tag store.
- */
- LRU(const Params *p);
-
- /**
- * Destructor
- */
- ~LRU() {}
-
- CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override;
- CacheBlk* findVictim(Addr addr) override;
- void insertBlock(PacketPtr pkt, BlkType *blk) override;
- void invalidate(CacheBlk *blk) override;
-};
-
-#endif // __MEM_CACHE_TAGS_LRU_HH__
diff --git a/src/mem/cache/tags/random_repl.cc b/src/mem/cache/tags/random_repl.cc
deleted file mode 100644
index aa5f6fcb9..000000000
--- a/src/mem/cache/tags/random_repl.cc
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (c) 2017 ARM Limited
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Copyright (c) 2014 The Regents of The University of Michigan
- * Copyright (c) 2016 ARM Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Anthony Gutierrez
- */
-
-/**
- * @file
- * Definitions of a random replacement tag store.
- */
-
-#include "mem/cache/tags/random_repl.hh"
-
-#include "base/random.hh"
-#include "debug/CacheRepl.hh"
-#include "mem/cache/base.hh"
-
-RandomRepl::RandomRepl(const Params *p)
- : BaseSetAssoc(p)
-
-{
-}
-
-CacheBlk*
-RandomRepl::accessBlock(Addr addr, bool is_secure, Cycles &lat)
-{
- return BaseSetAssoc::accessBlock(addr, is_secure, lat);
-}
-
-CacheBlk*
-RandomRepl::findVictim(Addr addr)
-{
- CacheBlk *blk = BaseSetAssoc::findVictim(addr);
- unsigned set = extractSet(addr);
-
- // if all blocks are valid, pick a replacement at random
- if (blk && blk->isValid()) {
- // find a random index within the bounds of the set
- int idx = random_mt.random<int>(0, assoc - 1);
- blk = sets[set].blks[idx];
- // Enforce allocation limit
- while (blk->way >= allocAssoc) {
- idx = (idx + 1) % assoc;
- blk = sets[set].blks[idx];
- }
-
- assert(idx < assoc);
- assert(idx >= 0);
- assert(blk->way < allocAssoc);
-
- DPRINTF(CacheRepl, "set %x: selecting blk %x for replacement\n",
- blk->set, regenerateBlkAddr(blk));
- }
-
- return blk;
-}
-
-void
-RandomRepl::insertBlock(PacketPtr pkt, BlkType *blk)
-{
- BaseSetAssoc::insertBlock(pkt, blk);
-}
-
-RandomRepl*
-RandomReplParams::create()
-{
- return new RandomRepl(this);
-}
diff --git a/src/mem/cache/tags/random_repl.hh b/src/mem/cache/tags/random_repl.hh
deleted file mode 100644
index 71b2f5ce6..000000000
--- a/src/mem/cache/tags/random_repl.hh
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2017 ARM Limited
- * All rights reserved.
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Copyright (c) 2014 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Anthony Gutierrez
- */
-
-/**
- * @file
- * Declaration of a random replacement tag store.
- * The RandomRepl tags first try to evict an invalid
- * block. If no invalid blocks are found, a candidate
- * for eviction is found at random.
- */
-
-#ifndef __MEM_CACHE_TAGS_RANDOM_REPL_HH__
-#define __MEM_CACHE_TAGS_RANDOM_REPL_HH__
-
-#include "mem/cache/tags/base_set_assoc.hh"
-#include "params/RandomRepl.hh"
-
-class RandomRepl : public BaseSetAssoc
-{
- public:
- /** Convenience typedef. */
- typedef RandomReplParams Params;
-
- /**
- * Construct and initiliaze this tag store.
- */
- RandomRepl(const Params *p);
-
- /**
- * Destructor
- */
- ~RandomRepl() {}
-
- CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat);
- CacheBlk* findVictim(Addr addr);
- void insertBlock(PacketPtr pkt, BlkType *blk);
-};
-
-#endif // __MEM_CACHE_TAGS_RANDOM_REPL_HH__