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-rw-r--r--src/mem/cache/blk.hh2
-rw-r--r--src/mem/cache/cache_impl.hh3
2 files changed, 3 insertions, 2 deletions
diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh
index 0be22f45d..2b3a34bb8 100644
--- a/src/mem/cache/blk.hh
+++ b/src/mem/cache/blk.hh
@@ -130,7 +130,7 @@ class CacheBlk
*/
class Lock {
public:
- int contextId; // locking context
+ ContextID contextId; // locking context
Addr lowAddr; // low address of lock range
Addr highAddr; // high address of lock range
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 62ab49538..dea95d955 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -332,7 +332,8 @@ Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
return false;
}
- int id = pkt->req->hasContextId() ? pkt->req->contextId() : -1;
+ ContextID id = pkt->req->hasContextId() ?
+ pkt->req->contextId() : InvalidContextID;
// Here lat is the value passed as parameter to accessBlock() function
// that can modify its value.
blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);