summaryrefslogtreecommitdiff
path: root/src/mem/cache
diff options
context:
space:
mode:
Diffstat (limited to 'src/mem/cache')
-rw-r--r--src/mem/cache/SConscript5
-rw-r--r--src/mem/cache/tags/SConscript4
2 files changed, 9 insertions, 0 deletions
diff --git a/src/mem/cache/SConscript b/src/mem/cache/SConscript
index 546e037bd..5ac7e34ad 100644
--- a/src/mem/cache/SConscript
+++ b/src/mem/cache/SConscript
@@ -35,3 +35,8 @@ SimObject('BaseCache.py')
Source('base_cache.cc')
Source('cache.cc')
Source('cache_builder.cc')
+
+TraceFlag('Cache')
+TraceFlag('CachePort')
+TraceFlag('CacheRepl')
+TraceFlag('HWPrefetch')
diff --git a/src/mem/cache/tags/SConscript b/src/mem/cache/tags/SConscript
index a65c44f22..18ed8408b 100644
--- a/src/mem/cache/tags/SConscript
+++ b/src/mem/cache/tags/SConscript
@@ -40,3 +40,7 @@ Source('split_lru.cc')
SimObject('Repl.py')
Source('repl/gen.cc')
+
+TraceFlag('IIC')
+TraceFlag('IICMore')
+TraceFlag('Split')