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-rw-r--r--src/mem/cache/base_cache.cc4
-rw-r--r--src/mem/cache/cache_impl.hh8
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index ec9e1cf9b..b44468486 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -81,9 +81,9 @@ BaseCache::CachePort::deviceBlockSize()
void
BaseCache::CachePort::checkAndSendFunctional(PacketPtr pkt)
{
- checkFunctional(pkt);
- if (!pkt->isResponse())
+ if (!checkFunctional(pkt)) {
sendFunctional(pkt);
+ }
}
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index c1b01d676..d144266ed 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -1253,9 +1253,9 @@ template<class TagStore>
void
Cache<TagStore>::CpuSidePort::recvFunctional(PacketPtr pkt)
{
- checkFunctional(pkt);
- if (!pkt->isResponse())
+ if (!checkFunctional(pkt)) {
myCache()->functionalAccess(pkt, cache->memSidePort);
+ }
}
@@ -1327,9 +1327,9 @@ template<class TagStore>
void
Cache<TagStore>::MemSidePort::recvFunctional(PacketPtr pkt)
{
- checkFunctional(pkt);
- if (!pkt->isResponse())
+ if (!checkFunctional(pkt)) {
myCache()->functionalAccess(pkt, cache->cpuSidePort);
+ }
}