diff options
Diffstat (limited to 'src/mem/cache')
| -rw-r--r-- | src/mem/cache/base.cc | 12 | ||||
| -rw-r--r-- | src/mem/cache/base.hh | 4 |
2 files changed, 8 insertions, 8 deletions
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc index a88749627..ad1c751bc 100644 --- a/src/mem/cache/base.cc +++ b/src/mem/cache/base.cc @@ -77,7 +77,7 @@ BaseCache::BaseCache(const Params *p) blocked(0), noTargetMSHR(NULL), missCount(p->max_miss_count), - drainEvent(NULL), + drainManager(NULL), addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()), system(p->system) { @@ -749,19 +749,19 @@ BaseCache::regStats() } unsigned int -BaseCache::drain(Event *de) +BaseCache::drain(DrainManager *dm) { - int count = memSidePort->drain(de) + cpuSidePort->drain(de); + int count = memSidePort->drain(dm) + cpuSidePort->drain(dm); // Set status if (count != 0) { - drainEvent = de; + drainManager = dm; - changeState(SimObject::Draining); + setDrainState(Drainable::Draining); DPRINTF(Drain, "Cache not drained\n"); return count; } - changeState(SimObject::Drained); + setDrainState(Drainable::Drained); return 0; } diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index 42ade9b0b..ab13be771 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -269,7 +269,7 @@ class BaseCache : public MemObject Counter missCount; /** The drain event. */ - Event *drainEvent; + DrainManager *drainManager; /** * The address range to which the cache responds on the CPU side. @@ -542,7 +542,7 @@ class BaseCache : public MemObject // interesting again. } - virtual unsigned int drain(Event *de); + virtual unsigned int drain(DrainManager *dm); virtual bool inCache(Addr addr) = 0; |