diff options
Diffstat (limited to 'src/mem/dram.hh')
| -rw-r--r-- | src/mem/dram.hh | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/src/mem/dram.hh b/src/mem/dram.hh index 352ca96ae..1745fa52b 100644 --- a/src/mem/dram.hh +++ b/src/mem/dram.hh @@ -117,27 +117,27 @@ class DRAMMemory : public PhysicalMemory Tick time_last_access; - Stats::Vector<> accesses; - Stats::Vector<> bytesRequested; - Stats::Vector<> bytesSent; - Stats::Vector<> compressedAccesses; - - Stats::Vector<> cycles_nCKE; - Stats::Vector<> cycles_all_precharge_CKE; - Stats::Vector<> cycles_all_precharge_nCKE; - Stats::Vector<> cycles_bank_active_nCKE; - Stats::Vector<> cycles_avg_ACT; - Stats::Vector<> cycles_read_out; - Stats::Vector<> cycles_write_in; - Stats::Vector<> cycles_between_misses; - Stats::Vector<> other_bank_read_access_miss; - Stats::Vector<> other_bank_write_access_miss; - Stats::Scalar<> total_latency; - Stats::Scalar<> total_icache_req; - Stats::Scalar<> total_arb_latency; + Stats::Vector accesses; + Stats::Vector bytesRequested; + Stats::Vector bytesSent; + Stats::Vector compressedAccesses; + + Stats::Vector cycles_nCKE; + Stats::Vector cycles_all_precharge_CKE; + Stats::Vector cycles_all_precharge_nCKE; + Stats::Vector cycles_bank_active_nCKE; + Stats::Vector cycles_avg_ACT; + Stats::Vector cycles_read_out; + Stats::Vector cycles_write_in; + Stats::Vector cycles_between_misses; + Stats::Vector other_bank_read_access_miss; + Stats::Vector other_bank_write_access_miss; + Stats::Scalar total_latency; + Stats::Scalar total_icache_req; + Stats::Scalar total_arb_latency; Stats::Formula avg_latency; Stats::Formula avg_arb_latency; - Stats::Vector2d<> bank_access_profile; + Stats::Vector2d bank_access_profile; protected: |