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-rw-r--r--src/mem/dramsim2.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index 58227e06a..fb1ee945b 100644
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -155,7 +155,7 @@ DRAMSim2::recvAtomic(PacketPtr pkt)
access(pkt);
// 50 ns is just an arbitrary value at this point
- return pkt->memInhibitAsserted() ? 0 : 50000;
+ return pkt->cacheResponding() ? 0 : 50000;
}
void
@@ -175,8 +175,8 @@ DRAMSim2::recvFunctional(PacketPtr pkt)
bool
DRAMSim2::recvTimingReq(PacketPtr pkt)
{
- // sink inhibited packets without further action
- if (pkt->memInhibitAsserted()) {
+ // if a cache is responding, sink the packet without further action
+ if (pkt->cacheResponding()) {
pendingDelete.reset(pkt);
return true;
}