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-rw-r--r--src/mem/port.cc9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mem/port.cc b/src/mem/port.cc
index 2111fa429..756eb8bdd 100644
--- a/src/mem/port.cc
+++ b/src/mem/port.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012,2015 ARM Limited
+ * Copyright (c) 2012,2015,2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -184,6 +184,13 @@ MasterPort::sendTimingReq(PacketPtr pkt)
}
bool
+MasterPort::tryTiming(PacketPtr pkt) const
+{
+ assert(pkt->isRequest());
+ return _slavePort->tryTiming(pkt);
+}
+
+bool
MasterPort::sendTimingSnoopResp(PacketPtr pkt)
{
assert(pkt->isResponse());