summaryrefslogtreecommitdiff
path: root/src/mem/protocol/MESI_CMP_directory-L1cache.sm
diff options
context:
space:
mode:
Diffstat (limited to 'src/mem/protocol/MESI_CMP_directory-L1cache.sm')
-rw-r--r--src/mem/protocol/MESI_CMP_directory-L1cache.sm1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mem/protocol/MESI_CMP_directory-L1cache.sm b/src/mem/protocol/MESI_CMP_directory-L1cache.sm
index 287bda004..b2ba0872e 100644
--- a/src/mem/protocol/MESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MESI_CMP_directory-L1cache.sm
@@ -130,7 +130,6 @@ machine(L1Cache, "MSI Directory L1 Cache CMP")
MessageBuffer mandatoryQueue, ordered="false";
- int cache_state_to_int(State state);
int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
void set_cache_entry(AbstractCacheEntry a);