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-rw-r--r--src/mem/protocol/MESI_Three_Level-msg.sm2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/MESI_Three_Level-msg.sm b/src/mem/protocol/MESI_Three_Level-msg.sm
index 7f32f1bcd..7fe4add46 100644
--- a/src/mem/protocol/MESI_Three_Level-msg.sm
+++ b/src/mem/protocol/MESI_Three_Level-msg.sm
@@ -50,7 +50,7 @@ enumeration(CoherenceClass, desc="...") {
// Class for messages sent between the L0 and the L1 controllers.
structure(CoherenceMsg, desc="...", interface="Message") {
- Address addr, desc="Physical address of the cache block";
+ Addr addr, desc="Physical address of the cache block";
CoherenceClass Class, desc="Type of message (GetS, GetX, PutX, etc)";
RubyAccessMode AccessMode, desc="user/supervisor access type";
MachineID Sender, desc="What component sent this message";