diff options
Diffstat (limited to 'src/mem/protocol/MESI_Two_Level-L1cache.sm')
| -rw-r--r-- | src/mem/protocol/MESI_Two_Level-L1cache.sm | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mem/protocol/MESI_Two_Level-L1cache.sm b/src/mem/protocol/MESI_Two_Level-L1cache.sm index a202a8deb..96c1699b7 100644 --- a/src/mem/protocol/MESI_Two_Level-L1cache.sm +++ b/src/mem/protocol/MESI_Two_Level-L1cache.sm @@ -27,16 +27,16 @@ */ machine(L1Cache, "MESI Directory L1 Cache CMP") - : Sequencer * sequencer, - CacheMemory * L1Icache, - CacheMemory * L1Dcache, - Prefetcher * prefetcher = 'NULL', - int l2_select_num_bits, - Cycles l1_request_latency = 2, - Cycles l1_response_latency = 2, - Cycles to_l2_latency = 1, - bool send_evictions, - bool enable_prefetch = "False" + : Sequencer * sequencer; + CacheMemory * L1Icache; + CacheMemory * L1Dcache; + Prefetcher * prefetcher; + int l2_select_num_bits; + Cycles l1_request_latency := 2; + Cycles l1_response_latency := 2; + Cycles to_l2_latency := 1; + bool send_evictions; + bool enable_prefetch := "False"; { // NODE L1 CACHE // From this node's L1 cache TO the network |