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-rw-r--r--src/mem/protocol/MI_example-cache.sm4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index 29cf8d482..561de2397 100644
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -317,11 +317,11 @@ machine(L1Cache, "MI Example L1 Cache")
}
action(n_popResponseQueue, "n", desc="Pop the response queue") {
- profileMsgDelay(1, responseNetwork_in.dequeue_getDelayCycles());
+ profileMsgDelay(1, responseNetwork_in.dequeue());
}
action(o_popForwardedRequestQueue, "o", desc="Pop the forwarded request queue") {
- profileMsgDelay(2, forwardRequestNetwork_in.dequeue_getDelayCycles());
+ profileMsgDelay(2, forwardRequestNetwork_in.dequeue());
}
action(p_profileMiss, "pi", desc="Profile cache miss") {