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Diffstat (limited to 'src/mem/protocol/MI_example-cache.sm')
-rw-r--r--src/mem/protocol/MI_example-cache.sm10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index b0217ffea..d1e6e500f 100644
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -36,14 +36,14 @@ machine(L1Cache, "MI Example L1 Cache")
// NETWORK BUFFERS
MessageBuffer * requestFromCache, network="To", virtual_network="2",
- ordered="true", vnet_type="request";
+ vnet_type="request";
MessageBuffer * responseFromCache, network="To", virtual_network="4",
- ordered="true", vnet_type="response";
+ vnet_type="response";
MessageBuffer * forwardToCache, network="From", virtual_network="3",
- ordered="true", vnet_type="forward";
+ vnet_type="forward";
MessageBuffer * responseToCache, network="From", virtual_network="4",
- ordered="true", vnet_type="response";
+ vnet_type="response";
{
// STATES
state_declaration(State, desc="Cache states") {
@@ -77,7 +77,7 @@ machine(L1Cache, "MI Example L1 Cache")
// STRUCTURE DEFINITIONS
- MessageBuffer mandatoryQueue, ordered="false";
+ MessageBuffer mandatoryQueue;
// CacheEntry
structure(Entry, desc="...", interface="AbstractCacheEntry") {