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-rw-r--r--src/mem/protocol/MI_example-cache.sm5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index 3380cd7e6..f3b1600f9 100644
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -44,6 +44,8 @@ machine(L1Cache, "MI Example L1 Cache")
vnet_type="forward";
MessageBuffer * responseToCache, network="From", virtual_network="4",
vnet_type="response";
+
+ MessageBuffer * mandatoryQueue;
{
// STATES
state_declaration(State, desc="Cache states") {
@@ -76,9 +78,6 @@ machine(L1Cache, "MI Example L1 Cache")
}
// STRUCTURE DEFINITIONS
-
- MessageBuffer mandatoryQueue;
-
// CacheEntry
structure(Entry, desc="...", interface="AbstractCacheEntry") {
State CacheState, desc="cache state";