diff options
Diffstat (limited to 'src/mem/protocol/MI_example-cache.sm')
| -rw-r--r-- | src/mem/protocol/MI_example-cache.sm | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm index 64771bac5..2f637e7b7 100644 --- a/src/mem/protocol/MI_example-cache.sm +++ b/src/mem/protocol/MI_example-cache.sm @@ -138,7 +138,7 @@ machine(L1Cache, "MI Example L1 Cache") in_port(forwardRequestNetwork_in, RequestMsg, forwardToCache) { if (forwardRequestNetwork_in.isReady()) { - peek(forwardRequestNetwork_in, RequestMsg) { + peek(forwardRequestNetwork_in, RequestMsg, block_on="Address") { if (in_msg.Type == CoherenceRequestType:GETX) { trigger(Event:Fwd_GETX, in_msg.Address); } @@ -160,7 +160,7 @@ machine(L1Cache, "MI Example L1 Cache") in_port(responseNetwork_in, ResponseMsg, responseToCache) { if (responseNetwork_in.isReady()) { - peek(responseNetwork_in, ResponseMsg) { + peek(responseNetwork_in, ResponseMsg, block_on="Address") { if (in_msg.Type == CoherenceResponseType:DATA) { trigger(Event:Data, in_msg.Address); } @@ -174,7 +174,7 @@ machine(L1Cache, "MI Example L1 Cache") // Mandatory Queue in_port(mandatoryQueue_in, CacheMsg, mandatoryQueue, desc="...") { if (mandatoryQueue_in.isReady()) { - peek(mandatoryQueue_in, CacheMsg) { + peek(mandatoryQueue_in, CacheMsg, block_on="LineAddress") { if (cacheMemory.isTagPresent(in_msg.LineAddress) == false && |