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Diffstat (limited to 'src/mem/protocol/MI_example-cache.sm')
| -rw-r--r-- | src/mem/protocol/MI_example-cache.sm | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm index afc415b5a..b11fddd95 100644 --- a/src/mem/protocol/MI_example-cache.sm +++ b/src/mem/protocol/MI_example-cache.sm @@ -140,6 +140,10 @@ machine(L1Cache, "MI Example L1 Cache") } } + DataBlock getDataBlock(Address addr), return_by_ref="yes" { + return getCacheEntry(addr).DataBlk; + } + GenericMachineType getNondirectHitMachType(MachineID sender) { if (machineIDToMachineType(sender) == MachineType:L1Cache) { // |